EPM5192IC-1 vs EPM5192LI-1 Comparison

Detailed side-by-side comparison of EPM5192IC-1 by Altera and EPM5192LI-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192IC-1 EPM5192LI-1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $13.95 $16.40
Family MAX 5000 EPLD MAX 5000
Macrocells 192 192
Usable Gates 3750 3,750
Dedicated Inputs 7 β€”
I/O Pins 64 β€”
Pin-to-Pin Delay (tPD) 15 ns (max, -1 speed grade) β€”
Counter Frequency (fCNT) 76.9 MHz β€”
Supply Voltage (VCC) 4.75 V to 5.25 V (nominal 5 V) β€”
Operating Temperature -40C to +85C (industrial) [DATA_NEEDED: industrial vs military range]
Technology CMOS, UV-erasable, in-system programmable β€”
Package 68-pin ceramic J-lead (IC-1 suffix) β€”
Programming Interface JTAG / IEEE Std 1149.1 boundary scan β€”
Security Bit Yes (design protection) β€”
Supply Current (Icc, typical) [DATA_NEEDED: Icc] mA β€”
Output Drive Current (IOH/IOL) [DATA_NEEDED: IOH/IOL] mA β€”
Device Type β€” EPLD (UV-Erasable/OTP Complex PLD)
Maximum Toggle Frequency β€” 40 MHz
Supply Voltage β€” 5 V
Propagation Delay (tPD) β€” [DATA_NEEDED: tPD in ns at -1 grade]
User I/O Pins β€” [DATA_NEEDED: user I/O count for JLCC variant]
Package Type β€” JLCC (windowed, ceramic, UV-erasable)
Process Technology β€” CMOS EPROM, UV-erasable
Speed Grade β€” -1
Pin Count β€” [DATA_NEEDED: pin count of LI package]
Mounting Type β€” Surface Mount (JLCC with J-leads)
MSL Level β€” [DATA_NEEDED: MSL level]
RoHS Status β€” [DATA_NEEDED: RoHS status of ceramic LI variant]
Lead Free β€” [DATA_NEEDED: lead-free]
Programmable Interconnect β€” Programmable Interconnect Array (PIA)
Architecture β€” EEPROM/EPROM-based, non-volatile, instant-on

Datasheets & Resources

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