EPM5192JC-1 vs EPM5192JC-ES Comparison

Detailed side-by-side comparison of EPM5192JC-1 by Altera and EPM5192JC-ES by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192JC-1 EPM5192JC-ES
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $22.40 $16.45
Family MAX 5000 β€”
Device Type CPLD - Complex Programmable Logic Device CPLD (EPLD)
Technology CMOS, UV-Erasable / OTP CMOS
Macrocells 192 192
Usable Gates 3750 β€”
Propagation Delay (tPD) 40 ns (speed grade -1) β€”
Maximum Internal Frequency (fMAX) 62.5 MHz β€”
Supply Voltage (VCC) 4.75 V to 5.25 V β€”
User I/O Pins 84 [DATA_NEEDED: user I/O count for JC-ES in PLCC-84]
Package Type 84-pin Ceramic Quad Flat Pack (CQFP), windowed β€”
JEDEC Package Code S-CQCC-J84 β€”
Operating Temperature 0 C to +70 C (commercial) [DATA_NEEDED: operating temperature range for ES grade]
Configuration Memory UV-EPROM (erasable under UV lamp) EPROM (UV-erasable, one-time programmable for JC-ES)
Programming Interface Altera MAX programming interface (parallel, pre-JTAG for this family) β€”
Process CMOS EPROM β€”
I/O Standard TTL/CMOS 5 V compatible β€”
Device Family β€” MAX 5000
Logic Array Blocks (LABs) β€” 12
Interconnect β€” Programmable Interconnect Array (PIA)
Package β€” 84-pin PLCC (J-lead, CQCC, JEDEC S-CQCC-J84)
Mounting Type β€” Surface Mount
Programming β€” Altera MAX+PLUS II or compatible programmer
Supply Voltage β€” [DATA_NEEDED: VCC nominal]
RoHS Status β€” [DATA_NEEDED: RoHS compliance]
Lead-Free β€” [DATA_NEEDED: lead-free status]
MSL Level β€” [DATA_NEEDED: MSL rating]
Note β€” Datasheet source: Altera MAX 5000 family document, 52 pages

Datasheets & Resources

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