EPM5192JC-1 vs EPM5192JC1 Comparison

Detailed side-by-side comparison of EPM5192JC-1 by Altera and EPM5192JC1 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192JC-1 EPM5192JC1
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $22.40 $48.30
Family MAX 5000 MAX 5000 (MAX 5xxx CPLD)
Device Type CPLD - Complex Programmable Logic Device β€”
Technology CMOS, UV-Erasable / OTP β€”
Macrocells 192 β€”
Usable Gates 3750 3750
Propagation Delay (tPD) 40 ns (speed grade -1) β€”
Maximum Internal Frequency (fMAX) 62.5 MHz β€”
Supply Voltage (VCC) 4.75 V to 5.25 V 5 V (nominal)
User I/O Pins 84 β€”
Package Type 84-pin Ceramic Quad Flat Pack (CQFP), windowed β€”
JEDEC Package Code S-CQCC-J84 β€”
Operating Temperature 0 C to +70 C (commercial) [DATA_NEEDED: operating temp range]
Configuration Memory UV-EPROM (erasable under UV lamp) β€”
Programming Interface Altera MAX programming interface (parallel, pre-JTAG for this family) JTAG-compatible (Altera MAX 5xxx)
Process CMOS EPROM β€”
I/O Standard TTL/CMOS 5 V compatible β€”
Manufacturer β€” Intel (formerly Altera Corporation)
Macro Cells β€” 192
Maximum Operating Frequency β€” 62.5 MHz
Process Technology β€” 0.5 Β΅m CMOS, UV-erasable EPROM
Propagation Delay (typ) β€” [DATA_NEEDED: propagation delay in ns]
I/O Pins β€” [DATA_NEEDED: I/O pin count]
Package β€” [DATA_NEEDED: exact package from datasheet]
Mounting Type β€” [DATA_NEEDED: surface mount or through-hole]
Logic Blocks (LABs) β€” 24 (8 macrocells per LAB)
RoHS Status β€” unknown
AEC-Q100 β€” not_applicable
Lifecycle β€” Obsolete - last-time-buy stock only at franchised distributors

Datasheets & Resources

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