EPM5192JC-2 vs EPM5192JC1 Comparison

Detailed side-by-side comparison of EPM5192JC-2 by Altera and EPM5192JC1 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM5192JC-2

EPM5192JC-2 - 192-Macrocell UV PLD, 45ns, 84-Pin CQCC | Altera

EPM5192JC-2 Obsolete

Specification Comparison

Parameter EPM5192JC-2 EPM5192JC1
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $22.50 $48.30
Device Family MAX 5000 β€”
Product Type UV-erasable Programmable Logic Device (PLD) β€”
Macrocells 192 β€”
Logic Array Blocks (LABs) 12 β€”
Interconnect Programmable Interconnect Array (PIA) β€”
User I/O Pins 64 β€”
Dedicated Inputs 7 β€”
External Clock Inputs 1 β€”
Propagation Delay (tPD) 45 ns β€”
Maximum Clock Frequency 40 MHz β€”
Process Technology CMOS 0.5 Β΅m CMOS, UV-erasable EPROM
Package 84-pin CQCC (Ceramic Quad Flat Pack, J-lead, windowed) [DATA_NEEDED: exact package from datasheet]
Mounting Type Surface Mount [DATA_NEEDED: surface mount or through-hole]
Number of Terminals 84 β€”
Programming Method UV-erase / EPROM β€”
Operating Temperature Range [DATA_NEEDED: operating temperature range] β€”
RoHS Status [DATA_NEEDED: RoHS compliance] unknown
Family β€” MAX 5000 (MAX 5xxx CPLD)
Manufacturer β€” Intel (formerly Altera Corporation)
Macro Cells β€” 192
Usable Gates β€” 3750
Maximum Operating Frequency β€” 62.5 MHz
Supply Voltage (VCC) β€” 5 V (nominal)
Propagation Delay (typ) β€” [DATA_NEEDED: propagation delay in ns]
I/O Pins β€” [DATA_NEEDED: I/O pin count]
Operating Temperature β€” [DATA_NEEDED: operating temp range]
Programming Interface β€” JTAG-compatible (Altera MAX 5xxx)
Logic Blocks (LABs) β€” 24 (8 macrocells per LAB)
AEC-Q100 β€” not_applicable
Lifecycle β€” Obsolete - last-time-buy stock only at franchised distributors

Datasheets & Resources

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