EPM5192JC vs EPM5192GC-2 Comparison
Detailed side-by-side comparison of EPM5192JC by Intel and EPM5192GC-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192JC | EPM5192GC-2 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.40 | $92.00 |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Series | EPM5192 (Classic / MAX-class) | β |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | β |
| Interconnect Architecture | Programmable Interconnect Array (PIA) | β |
| Process Technology | CMOS EPROM (UV-erasable) | β |
| Package | 68-pin PLCC (JC) windowed ceramic | β |
| Mounting Type | Surface Mount | Through-hole (PGA socket) |
| Programming Method | UV-erase + EPROM programmer | β |
| Non-Volatile Configuration | Yes (EPROM cell array) | β |
| Logic Family | Classic CPLD (EPM5xxx series) | β |
| Operating Temperature | [DATA_NEEDED: commercial / industrial / military grade] | Commercial (0C to +70C) |
| Supply Voltage | [DATA_NEEDED: VCC nominal] | β |
| Propagation Delay | [DATA_NEEDED: tpd spec by speed grade] | β |
| RoHS Status | [DATA_NEEDED: original Altera marking not RoHS] | Non-Compliant (ceramic PGA, lead-bearing per GlobalSpec listing) |
| Family | β | MAX 5000 |
| Logic Array Blocks | β | 16 (LABs of 16 macrocells each) |
| Usable I/O Pins | β | [DATA_NEEDED: exact user I/O count for PGA package] |
| Propagation Delay (tPD) | β | 12 ns typical (-2 grade) |
| Counter Frequency | β | 100 MHz minimum |
| Supply Voltage (VCC) | β | 5 V nominal |
| Technology | β | CMOS EPROM |
| Programmable Technology | β | UV-erasable / one-time programmable |
| Programming Toolchain | β | Altera MAX+PLUS II |
| Package Type | β | Pin Grid Array (PGA), ceramic |
| Speed Grade | β | -2 |