EPM5192JC vs EPM5192JC1 Comparison

Detailed side-by-side comparison of EPM5192JC by Intel and EPM5192JC1 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192JC EPM5192JC1
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $16.40 $48.30
Product Type CPLD (Complex Programmable Logic Device) β€”
Series EPM5192 (Classic / MAX-class) β€”
Macrocells 192 β€”
Logic Array Blocks (LABs) 12 β€”
Interconnect Architecture Programmable Interconnect Array (PIA) β€”
Process Technology CMOS EPROM (UV-erasable) 0.5 Β΅m CMOS, UV-erasable EPROM
Package 68-pin PLCC (JC) windowed ceramic [DATA_NEEDED: exact package from datasheet]
Mounting Type Surface Mount [DATA_NEEDED: surface mount or through-hole]
Programming Method UV-erase + EPROM programmer β€”
Non-Volatile Configuration Yes (EPROM cell array) β€”
Logic Family Classic CPLD (EPM5xxx series) β€”
Operating Temperature [DATA_NEEDED: commercial / industrial / military grade] [DATA_NEEDED: operating temp range]
Supply Voltage [DATA_NEEDED: VCC nominal] β€”
Propagation Delay [DATA_NEEDED: tpd spec by speed grade] β€”
RoHS Status [DATA_NEEDED: original Altera marking not RoHS] unknown
Family β€” MAX 5000 (MAX 5xxx CPLD)
Manufacturer β€” Intel (formerly Altera Corporation)
Macro Cells β€” 192
Usable Gates β€” 3750
Maximum Operating Frequency β€” 62.5 MHz
Supply Voltage (VCC) β€” 5 V (nominal)
Propagation Delay (typ) β€” [DATA_NEEDED: propagation delay in ns]
I/O Pins β€” [DATA_NEEDED: I/O pin count]
Programming Interface β€” JTAG-compatible (Altera MAX 5xxx)
Logic Blocks (LABs) β€” 24 (8 macrocells per LAB)
AEC-Q100 β€” not_applicable
Lifecycle β€” Obsolete - last-time-buy stock only at franchised distributors

Datasheets & Resources

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