EPM5192JC vs EPM5192JI Comparison
Detailed side-by-side comparison of EPM5192JC by Intel and EPM5192JI by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192JC | EPM5192JI |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.40 | $9.75 |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Series | EPM5192 (Classic / MAX-class) | β |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Interconnect Architecture | Programmable Interconnect Array (PIA) | β |
| Process Technology | CMOS EPROM (UV-erasable) | β |
| Package | 68-pin PLCC (JC) windowed ceramic | 84-pin PLCC (windowed, J-suffix ceramic) |
| Mounting Type | Surface Mount | Surface Mount (PLCC socket recommended for UV erasure) |
| Programming Method | UV-erase + EPROM programmer | Altera MAX 5000 programming algorithm (device programmer) |
| Non-Volatile Configuration | Yes (EPROM cell array) | β |
| Logic Family | Classic CPLD (EPM5xxx series) | β |
| Operating Temperature | [DATA_NEEDED: commercial / industrial / military grade] | -40 C to +125 C (industrial, I-suffix) |
| Supply Voltage | [DATA_NEEDED: VCC nominal] | 4.75 V to 5.25 V (nominal 5 V) |
| Propagation Delay | [DATA_NEEDED: tpd spec by speed grade] | β |
| RoHS Status | [DATA_NEEDED: original Altera marking not RoHS] | [DATA_NEEDED: RoHS status - pre-2010 part, likely non-compliant] |
| Family | β | MAX 5000 |
| Device Type | β | EPLD (UV-erasable CMOS Programmable Logic Device) |
| User I/O Pins | β | 64 |
| Dedicated Inputs | β | 7 |
| Propagation Delay (tpd) | β | 55 ns |
| Technology | β | CMOS EPROM, UV-erasable |
| Erasure Method | β | UV exposure through windowed package |