EPM5192JC68 vs EPM5192JC-2 Comparison

Detailed side-by-side comparison of EPM5192JC68 by Altera and EPM5192JC-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM5192JC-2

EPM5192JC-2 - 192-Macrocell UV PLD, 45ns, 84-Pin CQCC | Altera

EPM5192JC-2 Obsolete

Specification Comparison

Parameter EPM5192JC68 EPM5192JC-2
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $15.85 $22.50
Device Family MAX 5000 MAX 5000
Product Type EPLD (Erasable Programmable Logic Device) UV-erasable Programmable Logic Device (PLD)
Logic Elements / Macrocells 192 macrocells β€”
User I/O Pins 76 64
Number of Pins 68 β€”
Package Type PLCC-68 (J-Lead) β€”
Operating Temperature 0C to 70C (commercial, JC suffix) β€”
Supply Voltage [DATA_NEEDED: VCC] β€”
Pin-to-Pin Delay (tPD) [DATA_NEEDED: tPD] β€”
Maximum Frequency (fMAX) [DATA_NEEDED: fMAX] β€”
Configuration Memory UV-Erasable EPROM β€”
Programmable Interconnect Programmable Logic Array + Macrocells β€”
Dedicated Inputs 12 7
Clock Pins 4 dedicated β€”
Mounting Type Surface Mount (PLCC socket compatible) Surface Mount
RoHS Status [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS compliance]
Programming Tool MAX+PLUS II (legacy) β€”
Macrocells β€” 192
Logic Array Blocks (LABs) β€” 12
Interconnect β€” Programmable Interconnect Array (PIA)
External Clock Inputs β€” 1
Propagation Delay (tPD) β€” 45 ns
Maximum Clock Frequency β€” 40 MHz
Process Technology β€” CMOS
Package β€” 84-pin CQCC (Ceramic Quad Flat Pack, J-lead, windowed)
Number of Terminals β€” 84
Programming Method β€” UV-erase / EPROM
Operating Temperature Range β€” [DATA_NEEDED: operating temperature range]

Datasheets & Resources

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