EPM5192JI vs EPM5192JC Comparison
Detailed side-by-side comparison of EPM5192JI by Altera and EPM5192JC by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192JI | EPM5192JC |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.75 | $16.40 |
| Family | MAX 5000 | β |
| Device Type | EPLD (UV-erasable CMOS Programmable Logic Device) | β |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| User I/O Pins | 64 | β |
| Dedicated Inputs | 7 | β |
| Propagation Delay (tpd) | 55 ns | β |
| Supply Voltage | 4.75 V to 5.25 V (nominal 5 V) | [DATA_NEEDED: VCC nominal] |
| Technology | CMOS EPROM, UV-erasable | β |
| Package | 84-pin PLCC (windowed, J-suffix ceramic) | 68-pin PLCC (JC) windowed ceramic |
| Operating Temperature | -40 C to +125 C (industrial, I-suffix) | [DATA_NEEDED: commercial / industrial / military grade] |
| Mounting Type | Surface Mount (PLCC socket recommended for UV erasure) | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status - pre-2010 part, likely non-compliant] | [DATA_NEEDED: original Altera marking not RoHS] |
| Programming Method | Altera MAX 5000 programming algorithm (device programmer) | UV-erase + EPROM programmer |
| Erasure Method | UV exposure through windowed package | β |
| Product Type | β | CPLD (Complex Programmable Logic Device) |
| Series | β | EPM5192 (Classic / MAX-class) |
| Interconnect Architecture | β | Programmable Interconnect Array (PIA) |
| Process Technology | β | CMOS EPROM (UV-erasable) |
| Non-Volatile Configuration | β | Yes (EPROM cell array) |
| Logic Family | β | Classic CPLD (EPM5xxx series) |
| Propagation Delay | β | [DATA_NEEDED: tpd spec by speed grade] |