EPM5192JI vs EPM5192LI-1 Comparison

Detailed side-by-side comparison of EPM5192JI by Altera and EPM5192LI-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192JI EPM5192LI-1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $9.75 $16.40
Family MAX 5000 MAX 5000
Device Type EPLD (UV-erasable CMOS Programmable Logic Device) EPLD (UV-Erasable/OTP Complex PLD)
Macrocells 192 192
Logic Array Blocks (LABs) 12 β€”
User I/O Pins 64 [DATA_NEEDED: user I/O count for JLCC variant]
Dedicated Inputs 7 β€”
Propagation Delay (tpd) 55 ns β€”
Supply Voltage 4.75 V to 5.25 V (nominal 5 V) 5 V
Technology CMOS EPROM, UV-erasable β€”
Package 84-pin PLCC (windowed, J-suffix ceramic) β€”
Operating Temperature -40 C to +125 C (industrial, I-suffix) [DATA_NEEDED: industrial vs military range]
Mounting Type Surface Mount (PLCC socket recommended for UV erasure) Surface Mount (JLCC with J-leads)
RoHS Status [DATA_NEEDED: RoHS status - pre-2010 part, likely non-compliant] [DATA_NEEDED: RoHS status of ceramic LI variant]
Programming Method Altera MAX 5000 programming algorithm (device programmer) β€”
Erasure Method UV exposure through windowed package β€”
Usable Gates β€” 3,750
Maximum Toggle Frequency β€” 40 MHz
Propagation Delay (tPD) β€” [DATA_NEEDED: tPD in ns at -1 grade]
Package Type β€” JLCC (windowed, ceramic, UV-erasable)
Process Technology β€” CMOS EPROM, UV-erasable
Speed Grade β€” -1
Pin Count β€” [DATA_NEEDED: pin count of LI package]
MSL Level β€” [DATA_NEEDED: MSL level]
Lead Free β€” [DATA_NEEDED: lead-free]
Programmable Interconnect β€” Programmable Interconnect Array (PIA)
Architecture β€” EEPROM/EPROM-based, non-volatile, instant-on

Datasheets & Resources

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