EPM5192LC-1 vs EPM5192GC-1 Comparison

Detailed side-by-side comparison of EPM5192LC-1 by Altera and EPM5192GC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM5192LC-1

EPM5192LC-1 - 192-Macrocell MAX 5000 CPLD, 5V, 84-LDCC | Altera

EPM5192LC-1 Obsolete

Specification Comparison

Parameter EPM5192LC-1 EPM5192GC-1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $14.20 $17.85
Family MAX 5000 MAX 5000 (Classic)
Device Type EPLD / CPLD β€”
Macrocells 192 192
Logic Gates 3750 (typical usable) β€”
Dedicated Inputs 7 7
User I/O 64 β€”
Number of Pins 84 β€”
Package Type LDCC (Leaded Ceramic Chip Carrier), plastic windowless β€”
Propagation Delay 25 ns β€”
Maximum Clock Frequency 50 MHz β€”
Supply Voltage 5 V nominal (4.75 V to 5.25 V) β€”
Technology CMOS, UV-erasable / OTP EPROM cell β€”
Operating Temperature 0C to +70C (commercial) [DATA_NEEDED: operating temperature grade]
Programmable Memory EPROM (one-time or UV-erasable) β€”
Speed Grade -1 β€”
RoHS Status Non-compliant (ceramic LDCC with Pb-bearing terminations) [DATA_NEEDED: RoHS status]
Logic Type β€” CPLD (Complex Programmable Logic Device)
Usable Gates β€” 3,750
Logic Array Blocks (LABs) β€” 12
User I/O Pins β€” 64
Maximum Propagation Delay (tPD) β€” 40 ns
Maximum Frequency (fMAX) β€” 62.5 MHz
Supply Voltage (VCC) β€” 4.75 V to 5.25 V
Process Technology β€” CMOS, UV-erasable / OTP
Package β€” 100-pin Ceramic PGA (GC)
Mounting Type β€” Through-Hole (PGA)
Configuration Method β€” UV-Erase / One-Time Programmable
Interconnect β€” Peripheral Interconnect Array (PIA)

Datasheets & Resources

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