EPM5192LC-1 vs EPM5192IC-1 Comparison
Detailed side-by-side comparison of EPM5192LC-1 by Altera and EPM5192IC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM5192LC-1
EPM5192LC-1 - 192-Macrocell MAX 5000 CPLD, 5V, 84-LDCC | Altera
EPM5192LC-1 ObsoleteSpecification Comparison
| Parameter | EPM5192LC-1 | EPM5192IC-1 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $14.20 | $13.95 |
| Family | MAX 5000 | MAX 5000 EPLD |
| Device Type | EPLD / CPLD | β |
| Macrocells | 192 | 192 |
| Logic Gates | 3750 (typical usable) | β |
| Dedicated Inputs | 7 | 7 |
| User I/O | 64 | β |
| Number of Pins | 84 | β |
| Package Type | LDCC (Leaded Ceramic Chip Carrier), plastic windowless | β |
| Propagation Delay | 25 ns | β |
| Maximum Clock Frequency | 50 MHz | β |
| Supply Voltage | 5 V nominal (4.75 V to 5.25 V) | β |
| Technology | CMOS, UV-erasable / OTP EPROM cell | CMOS, UV-erasable, in-system programmable |
| Operating Temperature | 0C to +70C (commercial) | -40C to +85C (industrial) |
| Programmable Memory | EPROM (one-time or UV-erasable) | β |
| Speed Grade | -1 | β |
| RoHS Status | Non-compliant (ceramic LDCC with Pb-bearing terminations) | β |
| Usable Gates | β | 3750 |
| I/O Pins | β | 64 |
| Pin-to-Pin Delay (tPD) | β | 15 ns (max, -1 speed grade) |
| Counter Frequency (fCNT) | β | 76.9 MHz |
| Supply Voltage (VCC) | β | 4.75 V to 5.25 V (nominal 5 V) |
| Package | β | 68-pin ceramic J-lead (IC-1 suffix) |
| Programming Interface | β | JTAG / IEEE Std 1149.1 boundary scan |
| Security Bit | β | Yes (design protection) |
| Supply Current (Icc, typical) | β | [DATA_NEEDED: Icc] mA |
| Output Drive Current (IOH/IOL) | β | [DATA_NEEDED: IOH/IOL] mA |