EPM5192LC-2 vs EPM5192LC-1 Comparison

Detailed side-by-side comparison of EPM5192LC-2 by Altera and EPM5192LC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM5192LC-1

EPM5192LC-1 - 192-Macrocell MAX 5000 CPLD, 5V, 84-LDCC | Altera

EPM5192LC-1 Obsolete

Specification Comparison

Parameter EPM5192LC-2 EPM5192LC-1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $7.95 $14.20
Family MAX 5000 MAX 5000
Device Type CPLD (Complex Programmable Logic Device) EPLD / CPLD
Macrocells 192 192
Logic Array Blocks (LABs) 12 β€”
User I/O Pins 64 β€”
Dedicated Input Pins 7 β€”
External Clock Inputs 1 β€”
Propagation Delay (tPD) 45 ns (typical, -2 speed grade) β€”
Maximum Internal Frequency 50 MHz β€”
Interconnect Programmable Interconnect Array (PIA) β€”
Process Technology CMOS β€”
Package PQCC-84 (PLCC-84, J-lead, surface mount) β€”
Programming Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG) β€”
Operating Temperature [DATA_NEEDED: commercial/industrial/military grade] 0C to +70C (commercial)
Supply Voltage 5 V (typical MAX 5000 family) 5 V nominal (4.75 V to 5.25 V)
RoHS Status [DATA_NEEDED: pre-RoHS legacy part β€” likely non-RoHS] Non-compliant (ceramic LDCC with Pb-bearing terminations)
Logic Gates β€” 3750 (typical usable)
Dedicated Inputs β€” 7
User I/O β€” 64
Number of Pins β€” 84
Package Type β€” LDCC (Leaded Ceramic Chip Carrier), plastic windowless
Propagation Delay β€” 25 ns
Maximum Clock Frequency β€” 50 MHz
Technology β€” CMOS, UV-erasable / OTP EPROM cell
Programmable Memory β€” EPROM (one-time or UV-erasable)
Speed Grade β€” -1

Datasheets & Resources

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