EPM5192LC-25 vs EPM5192JC-1 Comparison

Detailed side-by-side comparison of EPM5192LC-25 by Altera and EPM5192JC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM5192LC-25

EPM5192LC-25 - MAX 5000 CPLD, 192 Macrocells, 25ns | Altera

EPM5192LC-25 Obsolete
Altera
EPM5192JC-1

EPM5192JC-1 - 192-Macrocell UV CPLD, 40ns, 5V | Altera MAX 5000

EPM5192JC-1 Obsolete

Specification Comparison

Parameter EPM5192LC-25 EPM5192JC-1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $55.00 $22.40
Product Type CPLD (Complex Programmable Logic Device) β€”
Family MAX 5000 MAX 5000
Macrocells 192 192
Logic Elements 192 (1 macrocell β‰ˆ 1 LE in MAX 5000 architecture) β€”
Pin-to-Pin Delay (tPD) 25 ns β€”
Speed Grade -25 (25 ns) β€”
Package JLCC-84 (ceramic J-lead chip carrier) β€”
Mounting Type Surface Mount β€”
Programmable Technology UV-erasable / OTP (EPROM-based) β€”
Programming Interface JTAG / Altera programming hardware (legacy) Altera MAX programming interface (parallel, pre-JTAG for this family)
Operating Temperature 0C to +70C (commercial) 0 C to +70 C (commercial)
Supply Voltage 5 V (typical, MAX 5000) β€”
I/O Standard TTL-compatible TTL/CMOS 5 V compatible
Configuration Memory Non-volatile EPROM (on-chip) UV-EPROM (erasable under UV lamp)
Manufacturer Altera Corporation (now Intel PSG) β€”
RoHS Status Unknown (legacy ceramic package typically non-RoHS) β€”
Device Type β€” CPLD - Complex Programmable Logic Device
Technology β€” CMOS, UV-Erasable / OTP
Usable Gates β€” 3750
Propagation Delay (tPD) β€” 40 ns (speed grade -1)
Maximum Internal Frequency (fMAX) β€” 62.5 MHz
Supply Voltage (VCC) β€” 4.75 V to 5.25 V
User I/O Pins β€” 84
Package Type β€” 84-pin Ceramic Quad Flat Pack (CQFP), windowed
JEDEC Package Code β€” S-CQCC-J84
Process β€” CMOS EPROM

Datasheets & Resources

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