EPM5192LC-35 vs EPM5192JC-1 Comparison

Detailed side-by-side comparison of EPM5192LC-35 by Altera and EPM5192JC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192LC-35 EPM5192JC-1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $15.25 $22.40
Series MAX 5000 β€”
Family MAX 5000 CPLD MAX 5000
Logic Elements / Macrocells 192 macrocells β€”
Pin-to-Pin Delay (tPD) 35 ns β€”
Speed Grade -35 β€”
Programmable Type UV-Erasable / OTP (EPROM-based) β€”
Package Type JLCC (J-Lead Ceramic Chip Carrier) 84-pin Ceramic Quad Flat Pack (CQFP), windowed
Mounting Type Surface Mount β€”
Logic Voltage 5 V TTL-compatible I/O β€”
Operating Temperature Commercial (0C to +70C) per LC suffix 0 C to +70 C (commercial)
Programming Method Altera legacy programmer (EPROM-based) β€”
Architecture LAB-based with Programmable Interconnect Array (PIA) β€”
I/O Standard TTL TTL/CMOS 5 V compatible
RoHS Status Non-compliant (ceramic hermetic package) β€”
Lifecycle Status Obsolete - last-time-buy stock only β€”
Datasheet Document Altera MAX 5000 family datasheet (per alldatasheet.com) β€”
Device Type β€” CPLD - Complex Programmable Logic Device
Technology β€” CMOS, UV-Erasable / OTP
Macrocells β€” 192
Usable Gates β€” 3750
Propagation Delay (tPD) β€” 40 ns (speed grade -1)
Maximum Internal Frequency (fMAX) β€” 62.5 MHz
Supply Voltage (VCC) β€” 4.75 V to 5.25 V
User I/O Pins β€” 84
JEDEC Package Code β€” S-CQCC-J84
Configuration Memory β€” UV-EPROM (erasable under UV lamp)
Programming Interface β€” Altera MAX programming interface (parallel, pre-JTAG for this family)
Process β€” CMOS EPROM

Datasheets & Resources

Browse All Products Create BOM Request Quote