EPM5192LC-35 vs EPM5192JC-2 Comparison

Detailed side-by-side comparison of EPM5192LC-35 by Altera and EPM5192JC-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192LC-35 EPM5192JC-2
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $15.25 $22.50
Series MAX 5000 β€”
Family MAX 5000 CPLD β€”
Logic Elements / Macrocells 192 macrocells β€”
Pin-to-Pin Delay (tPD) 35 ns β€”
Speed Grade -35 β€”
Programmable Type UV-Erasable / OTP (EPROM-based) β€”
Package Type JLCC (J-Lead Ceramic Chip Carrier) β€”
Mounting Type Surface Mount Surface Mount
Logic Voltage 5 V TTL-compatible I/O β€”
Operating Temperature Commercial (0C to +70C) per LC suffix β€”
Programming Method Altera legacy programmer (EPROM-based) UV-erase / EPROM
Architecture LAB-based with Programmable Interconnect Array (PIA) β€”
I/O Standard TTL β€”
RoHS Status Non-compliant (ceramic hermetic package) [DATA_NEEDED: RoHS compliance]
Lifecycle Status Obsolete - last-time-buy stock only β€”
Datasheet Document Altera MAX 5000 family datasheet (per alldatasheet.com) β€”
Device Family β€” MAX 5000
Product Type β€” UV-erasable Programmable Logic Device (PLD)
Macrocells β€” 192
Logic Array Blocks (LABs) β€” 12
Interconnect β€” Programmable Interconnect Array (PIA)
User I/O Pins β€” 64
Dedicated Inputs β€” 7
External Clock Inputs β€” 1
Propagation Delay (tPD) β€” 45 ns
Maximum Clock Frequency β€” 40 MHz
Process Technology β€” CMOS
Package β€” 84-pin CQCC (Ceramic Quad Flat Pack, J-lead, windowed)
Number of Terminals β€” 84
Operating Temperature Range β€” [DATA_NEEDED: operating temperature range]

Datasheets & Resources

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