EPM5192LC-35 vs EPM5192LC-1 Comparison
Detailed side-by-side comparison of EPM5192LC-35 by Altera and EPM5192LC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192LC-35 | EPM5192LC-1 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $15.25 | $14.20 |
| Series | MAX 5000 | β |
| Family | MAX 5000 CPLD | MAX 5000 |
| Logic Elements / Macrocells | 192 macrocells | β |
| Pin-to-Pin Delay (tPD) | 35 ns | β |
| Speed Grade | -35 | -1 |
| Programmable Type | UV-Erasable / OTP (EPROM-based) | β |
| Package Type | JLCC (J-Lead Ceramic Chip Carrier) | LDCC (Leaded Ceramic Chip Carrier), plastic windowless |
| Mounting Type | Surface Mount | β |
| Logic Voltage | 5 V TTL-compatible I/O | β |
| Operating Temperature | Commercial (0C to +70C) per LC suffix | 0C to +70C (commercial) |
| Programming Method | Altera legacy programmer (EPROM-based) | β |
| Architecture | LAB-based with Programmable Interconnect Array (PIA) | β |
| I/O Standard | TTL | β |
| RoHS Status | Non-compliant (ceramic hermetic package) | Non-compliant (ceramic LDCC with Pb-bearing terminations) |
| Lifecycle Status | Obsolete - last-time-buy stock only | β |
| Datasheet Document | Altera MAX 5000 family datasheet (per alldatasheet.com) | β |
| Device Type | β | EPLD / CPLD |
| Macrocells | β | 192 |
| Logic Gates | β | 3750 (typical usable) |
| Dedicated Inputs | β | 7 |
| User I/O | β | 64 |
| Number of Pins | β | 84 |
| Propagation Delay | β | 25 ns |
| Maximum Clock Frequency | β | 50 MHz |
| Supply Voltage | β | 5 V nominal (4.75 V to 5.25 V) |
| Technology | β | CMOS, UV-erasable / OTP EPROM cell |
| Programmable Memory | β | EPROM (one-time or UV-erasable) |