EPM5192LC-35 vs EPM5192LC-2 Comparison

Detailed side-by-side comparison of EPM5192LC-35 by Altera and EPM5192LC-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192LC-35 EPM5192LC-2
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $15.25 $7.95
Series MAX 5000 β€”
Family MAX 5000 CPLD MAX 5000
Logic Elements / Macrocells 192 macrocells β€”
Pin-to-Pin Delay (tPD) 35 ns β€”
Speed Grade -35 β€”
Programmable Type UV-Erasable / OTP (EPROM-based) β€”
Package Type JLCC (J-Lead Ceramic Chip Carrier) β€”
Mounting Type Surface Mount β€”
Logic Voltage 5 V TTL-compatible I/O β€”
Operating Temperature Commercial (0C to +70C) per LC suffix [DATA_NEEDED: commercial/industrial/military grade]
Programming Method Altera legacy programmer (EPROM-based) β€”
Architecture LAB-based with Programmable Interconnect Array (PIA) β€”
I/O Standard TTL β€”
RoHS Status Non-compliant (ceramic hermetic package) [DATA_NEEDED: pre-RoHS legacy part β€” likely non-RoHS]
Lifecycle Status Obsolete - last-time-buy stock only β€”
Datasheet Document Altera MAX 5000 family datasheet (per alldatasheet.com) β€”
Device Type β€” CPLD (Complex Programmable Logic Device)
Macrocells β€” 192
Logic Array Blocks (LABs) β€” 12
User I/O Pins β€” 64
Dedicated Input Pins β€” 7
External Clock Inputs β€” 1
Propagation Delay (tPD) β€” 45 ns (typical, -2 speed grade)
Maximum Internal Frequency β€” 50 MHz
Interconnect β€” Programmable Interconnect Array (PIA)
Process Technology β€” CMOS
Package β€” PQCC-84 (PLCC-84, J-lead, surface mount)
Programming β€” Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG)
Supply Voltage β€” 5 V (typical MAX 5000 family)

Datasheets & Resources

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