EPM5192LC-M091A vs EPM5192LC-35 Comparison

Detailed side-by-side comparison of EPM5192LC-M091A by Altera and EPM5192LC-35 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192LC-M091A EPM5192LC-35
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $62.00 $15.25
Device Family MAX 5000 EPLD β€”
Macrocells 192 β€”
User I/O Pins 64 β€”
Dedicated Inputs 7 β€”
Logic Array Blocks (LABs) 12 β€”
Global Clock Inputs 1 β€”
Propagation Delay (tpd) 55 ns (typical, MAX 5000 family) β€”
Supply Voltage (Vcc) 5 V β€”
Technology UV-erasable CMOS, EPROM-based β€”
Interconnect Programmable Interconnect Array (PIA) β€”
Package LC (custom pin-grid / customer-specific, M091A designation) β€”
Pin Count [DATA_NEEDED: pin count of LC-M091A package] β€”
Operating Temperature [DATA_NEEDED: operating temperature grade] Commercial (0C to +70C) per LC suffix
Configuration Memory Non-volatile EPROM (UV-erasable) β€”
Development Tool Altera MAX+PLUS II (legacy) β€”
RoHS Status [DATA_NEEDED: RoHS status for EPM5192LC-M091A] Non-compliant (ceramic hermetic package)
Series β€” MAX 5000
Family β€” MAX 5000 CPLD
Logic Elements / Macrocells β€” 192 macrocells
Pin-to-Pin Delay (tPD) β€” 35 ns
Speed Grade β€” -35
Programmable Type β€” UV-Erasable / OTP (EPROM-based)
Package Type β€” JLCC (J-Lead Ceramic Chip Carrier)
Mounting Type β€” Surface Mount
Logic Voltage β€” 5 V TTL-compatible I/O
Programming Method β€” Altera legacy programmer (EPROM-based)
Architecture β€” LAB-based with Programmable Interconnect Array (PIA)
I/O Standard β€” TTL
Lifecycle Status β€” Obsolete - last-time-buy stock only
Datasheet Document β€” Altera MAX 5000 family datasheet (per alldatasheet.com)

Datasheets & Resources

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