EPM5192LC vs EPM5192LC-2 Comparison
Detailed side-by-side comparison of EPM5192LC by Altera and EPM5192LC-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192LC | EPM5192LC-2 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $28.40 | $7.95 |
| Family | MAX 7000S | MAX 5000 |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | β |
| Global Clock Inputs | 1 | β |
| Propagation Delay (tPD) | 55 ns (typical, commercial) | 45 ns (typical, -2 speed grade) |
| Maximum Clock Frequency (fMAX) | 50 MHz | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (nominal 5 V) | β |
| Process Technology | CMOS, UV-erasable/OTP EPROM configuration | CMOS |
| Programmable Interconnect | Programmable Interconnect Array (PIA), fixed delay | β |
| Boundary-Scan Support | JTAG IEEE 1149.1 | β |
| Programming Interface | JTAG (ByteBlaster-compatible) | β |
| Operating Temperature (commercial) | 0C to +70C | β |
| Package | JLCC-68 (windowed ceramic, LC suffix) | PQCC-84 (PLCC-84, J-lead, surface mount) |
| Mounting Type | Surface Mount | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: pre-RoHS legacy part β likely non-RoHS] |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Dedicated Input Pins | β | 7 |
| External Clock Inputs | β | 1 |
| Maximum Internal Frequency | β | 50 MHz |
| Interconnect | β | Programmable Interconnect Array (PIA) |
| Programming | β | Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG) |
| Operating Temperature | β | [DATA_NEEDED: commercial/industrial/military grade] |
| Supply Voltage | β | 5 V (typical MAX 5000 family) |