EPM5192LC84-2 vs EPM5192LC-1 Comparison
Detailed side-by-side comparison of EPM5192LC84-2 by Altera and EPM5192LC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM5192LC84-2
EPM5192LC84-2 - MAX 5000 CPLD 192 Macrocells 84-PLCC | Altera
EPM5192LC84-2 ObsoleteAltera
EPM5192LC-1
EPM5192LC-1 - 192-Macrocell MAX 5000 CPLD, 5V, 84-LDCC | Altera
EPM5192LC-1 ObsoleteSpecification Comparison
| Parameter | EPM5192LC84-2 | EPM5192LC-1 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.10 | $14.20 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (UV-Erasable / OTP Complex PLD) | EPLD / CPLD |
| Macrocells | 192 | 192 |
| Package | 84-pin PLCC (LC) | β |
| Speed Grade | -2 | -1 |
| Supply Voltage | 5 V (TTL-compatible I/O) | 5 V nominal (4.75 V to 5.25 V) |
| Technology | CMOS, UV-erasable / OTP | CMOS, UV-erasable / OTP EPROM cell |
| Logic Elements | AND-OR array with macrocell flip-flops | β |
| Programming Method | Altera legacy programmer (JEDEC bitstream) | β |
| Operating Temperature | Commercial (0C to +70C) | 0C to +70C (commercial) |
| Mounting Type | Surface Mount | β |
| RoHS Status | Non-compliant (SnPb lead finish typical for this vintage) | Non-compliant (ceramic LDCC with Pb-bearing terminations) |
| Lifecycle Status | Obsolete (last Altera MAX 5000 production) | β |
| JTAG Support | Vendor-specific programming interface (pre-IEEE 1532) | β |
| I/O Standard | TTL, 5V CMOS-compatible | β |
| Logic Gates | β | 3750 (typical usable) |
| Dedicated Inputs | β | 7 |
| User I/O | β | 64 |
| Number of Pins | β | 84 |
| Package Type | β | LDCC (Leaded Ceramic Chip Carrier), plastic windowless |
| Propagation Delay | β | 25 ns |
| Maximum Clock Frequency | β | 50 MHz |
| Programmable Memory | β | EPROM (one-time or UV-erasable) |