EPM5192LC84-2 vs EPM5192LC84 Comparison

Detailed side-by-side comparison of EPM5192LC84-2 by Altera and EPM5192LC84 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM5192LC84-2

EPM5192LC84-2 - MAX 5000 CPLD 192 Macrocells 84-PLCC | Altera

EPM5192LC84-2 Obsolete
Altera
EPM5192LC84

EPM5192LC84 - 192-Cell OTP PLD, 55ns, LCC-84 | Altera / Cypress

EPM5192LC84 Obsolete

Specification Comparison

Parameter EPM5192LC84-2 EPM5192LC84
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $7.10 $15.95
Family MAX 5000 MAX 5000
Device Type EPLD (UV-Erasable / OTP Complex PLD) β€”
Macrocells 192 β€”
Package 84-pin PLCC (LC) LCC-84 (PQCC84, MS-018)
Speed Grade -2 β€”
Supply Voltage 5 V (TTL-compatible I/O) [DATA_NEEDED: VCC range]
Technology CMOS, UV-erasable / OTP β€”
Logic Elements AND-OR array with macrocell flip-flops β€”
Programming Method Altera legacy programmer (JEDEC bitstream) β€”
Operating Temperature Commercial (0C to +70C) [DATA_NEEDED: operating temperature range]
Mounting Type Surface Mount Surface Mount (Socket-compatible)
RoHS Status Non-compliant (SnPb lead finish typical for this vintage) unknown
Lifecycle Status Obsolete (last Altera MAX 5000 production) β€”
JTAG Support Vendor-specific programming interface (pre-IEEE 1532) β€”
I/O Standard TTL, 5V CMOS-compatible β€”
Product Type β€” Complex Programmable Logic Device (CPLD)
Macrocells (Logic Cells) β€” 192
Propagation Delay (tPD) β€” 55 ns
Process Technology β€” CMOS
Programmability β€” OTP / UV-Erasable
Pin Count β€” 84
User I/O β€” [DATA_NEEDED: max user I/O count]
Configuration Memory β€” EPROM / UV-Erasable
Programming Interface β€” JTAG / Altera legacy (MAX+PLUS II baseline)
MSL Level β€” [DATA_NEEDED: MSL rating]

Datasheets & Resources

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