EPM5192LC84-2 vs EPM5192LC84-1 Comparison
Detailed side-by-side comparison of EPM5192LC84-2 by Altera and EPM5192LC84-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192LC84-2 | EPM5192LC84-1 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.10 | $21.85 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (UV-Erasable / OTP Complex PLD) | EPLD (UV-Erasable / OTP Complex PLD) |
| Macrocells | 192 | 192 |
| Package | 84-pin PLCC (LC) | 84-pin PLCC (LC84) |
| Speed Grade | -2 | -1 |
| Supply Voltage | 5 V (TTL-compatible I/O) | β |
| Technology | CMOS, UV-erasable / OTP | β |
| Logic Elements | AND-OR array with macrocell flip-flops | β |
| Programming Method | Altera legacy programmer (JEDEC bitstream) | β |
| Operating Temperature | Commercial (0C to +70C) | 0C to +70C (commercial) |
| Mounting Type | Surface Mount | Surface Mount (J-lead) |
| RoHS Status | Non-compliant (SnPb lead finish typical for this vintage) | [DATA_NEEDED: not stated in provided data] |
| Lifecycle Status | Obsolete (last Altera MAX 5000 production) | β |
| JTAG Support | Vendor-specific programming interface (pre-IEEE 1532) | β |
| I/O Standard | TTL, 5V CMOS-compatible | β |
| Logic Array Blocks (LABs) | β | 16 |
| Usable Gates | β | 7,500 |
| Propagation Delay (tPD) | β | [DATA_NEEDED: tPD ns value] |
| Supply Voltage (VCC) | β | 5 V |
| Program Memory Type | β | UV-EPROM / OTP |
| I/O Count | β | [DATA_NEEDED: I/O pin count] |
| Process Technology | β | CMOS EPROM |