EPM5192LC84-2 vs EPM5192LI Comparison
Detailed side-by-side comparison of EPM5192LC84-2 by Altera and EPM5192LI by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM5192LC84-2
EPM5192LC84-2 - MAX 5000 CPLD 192 Macrocells 84-PLCC | Altera
EPM5192LC84-2 ObsoleteSpecification Comparison
| Parameter | EPM5192LC84-2 | EPM5192LI |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.10 | $9.75 |
| Family | MAX 5000 | β |
| Device Type | EPLD (UV-Erasable / OTP Complex PLD) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 192 | 192 |
| Package | 84-pin PLCC (LC) | 84-pin PQCC (J84) |
| Speed Grade | -2 | β |
| Supply Voltage | 5 V (TTL-compatible I/O) | β |
| Technology | CMOS, UV-erasable / OTP | CMOS, UV-erasable EPROM |
| Logic Elements | AND-OR array with macrocell flip-flops | β |
| Programming Method | Altera legacy programmer (JEDEC bitstream) | β |
| Operating Temperature | Commercial (0C to +70C) | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | Non-compliant (SnPb lead finish typical for this vintage) | unknown |
| Lifecycle Status | Obsolete (last Altera MAX 5000 production) | β |
| JTAG Support | Vendor-specific programming interface (pre-IEEE 1532) | β |
| I/O Standard | TTL, 5V CMOS-compatible | β |
| Device Family | β | MAX 5000 |
| Usable Gates | β | 3,750 |
| Logic Array Blocks (LABs) | β | 12 |
| Maximum Operating Frequency | β | 40 MHz |
| Propagation Delay (tPD) | β | 55 ns |
| Supply Voltage (VCC) | β | 4.5 V to 5.5 V |
| Dedicated Inputs | β | 7 |
| Total Inputs | β | 72 |
| User I/O Pins | β | 64 |
| JEDEC Package Code | β | S-PQCC-J84 |
| Operating Temperature Range | β | Industrial (-40C to +85C) |