EPM5192LC84 vs EPM5192GI84 Comparison

Detailed side-by-side comparison of EPM5192LC84 by Altera and EPM5192GI84 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192LC84 EPM5192GI84
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $15.95 $19.80
Product Type Complex Programmable Logic Device (CPLD) β€”
Family MAX 5000 MAX 5000
Macrocells (Logic Cells) 192 β€”
Propagation Delay (tPD) 55 ns β€”
Process Technology CMOS β€”
Programmability OTP / UV-Erasable UV-erasable (windowed) / OTP
Package LCC-84 (PQCC84, MS-018) 84-pin PGA (WPGA, square, through-hole, pin/peg terminals)
Pin Count 84 β€”
Mounting Type Surface Mount (Socket-compatible) Through-Hole (PGA socket or PCB pin/peg)
Operating Temperature [DATA_NEEDED: operating temperature range] β€”
Supply Voltage [DATA_NEEDED: VCC range] β€”
User I/O [DATA_NEEDED: max user I/O count] β€”
Configuration Memory EPROM / UV-Erasable β€”
Programming Interface JTAG / Altera legacy (MAX+PLUS II baseline) β€”
RoHS Status unknown [DATA_NEEDED: most legacy PGA parts are non-RoHS]
MSL Level [DATA_NEEDED: MSL rating] β€”
Device Type β€” UV-Erasable / OTP Complex PLD (CPLD)
Macrocells β€” 192
Logic Array Blocks β€” [DATA_NEEDED: number of LABs]
Package Code β€” WPGA
Operating Voltage (VCC) β€” 5 V (typical)
I/O Logic Compatibility β€” TTL
Temperature Grade β€” Industrial
Programmable Flip-Flop Modes β€” D, T, JK, SR
Programming File Format β€” JEDEC map via MAX+PLUS II / A+PLUS
Propagation Delay β€” [DATA_NEEDED: tPD in ns]
Max User I/O Pins β€” [DATA_NEEDED: usable I/O count for this package]
Operating Temperature Range β€” -40 C to +85 C (industrial)
Lead-Free β€” [DATA_NEEDED: legacy part, likely contains lead]
Number of Terminals β€” 84
Terminal Form β€” PIN/PEG
Package Shape β€” SQUARE

Datasheets & Resources

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