EPM5192LI84 vs EPM5192LC84 Comparison
Detailed side-by-side comparison of EPM5192LI84 by Altera and EPM5192LC84 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192LI84 | EPM5192LC84 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $21.60 | $15.95 |
| Device Family | MAX 5000 | β |
| Product Type | UV-Erasable/OTP Complex PLD (CPLD) | Complex Programmable Logic Device (CPLD) |
| Usable Gates | 3,750 gates | β |
| Macro Cells | 192 | β |
| Maximum Toggle Frequency | 40 MHz | β |
| Pin-to-Pin Delay (tPD) | 25 ns | β |
| Supply Voltage (VCC) | 5 V (single supply) | β |
| User I/O Pins | 64 (max) | β |
| Operating Temperature Range | -40 Β°C to +85 Β°C (industrial) | β |
| Package Type | 84-pin PLCC (J-lead, package code J84/QCCJ) | β |
| Mounting Type | Surface Mount (socket-compatible) | Surface Mount (Socket-compatible) |
| Configuration Memory | OTP / UV-erasable EPROM | EPROM / UV-Erasable |
| Programming Method | Stand-alone programmer (no JTAG on LI84 OTP variant) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | unknown |
| Logic Compatibility | TTL-compatible I/O | β |
| Family | β | MAX 5000 |
| Macrocells (Logic Cells) | β | 192 |
| Propagation Delay (tPD) | β | 55 ns |
| Process Technology | β | CMOS |
| Programmability | β | OTP / UV-Erasable |
| Package | β | LCC-84 (PQCC84, MS-018) |
| Pin Count | β | 84 |
| Operating Temperature | β | [DATA_NEEDED: operating temperature range] |
| Supply Voltage | β | [DATA_NEEDED: VCC range] |
| User I/O | β | [DATA_NEEDED: max user I/O count] |
| Programming Interface | β | JTAG / Altera legacy (MAX+PLUS II baseline) |
| MSL Level | β | [DATA_NEEDED: MSL rating] |