EPM5192LI84 vs EPM5192LI-2 Comparison
Detailed side-by-side comparison of EPM5192LI84 by Altera and EPM5192LI-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192LI84 | EPM5192LI-2 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $21.60 | $7.90 |
| Device Family | MAX 5000 | β |
| Product Type | UV-Erasable/OTP Complex PLD (CPLD) | β |
| Usable Gates | 3,750 gates | β |
| Macro Cells | 192 | β |
| Maximum Toggle Frequency | 40 MHz | β |
| Pin-to-Pin Delay (tPD) | 25 ns | β |
| Supply Voltage (VCC) | 5 V (single supply) | β |
| User I/O Pins | 64 (max) | β |
| Operating Temperature Range | -40 Β°C to +85 Β°C (industrial) | β |
| Package Type | 84-pin PLCC (J-lead, package code J84/QCCJ) | β |
| Mounting Type | Surface Mount (socket-compatible) | Surface Mount |
| Configuration Memory | OTP / UV-erasable EPROM | β |
| Programming Method | Stand-alone programmer (no JTAG on LI84 OTP variant) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Logic Compatibility | TTL-compatible I/O | β |
| Family | β | MAX 5000 |
| Device Type | β | EPLD (Erasable/OTP Complex PLD) |
| Macrocells | β | 192 |
| Logic Array Blocks (LABs) | β | 12 |
| User I/O | β | 64 |
| Total Inputs | β | 72 (7 dedicated + 64 I/O) |
| Propagation Delay (tpd) | β | 55 ns (max) |
| Maximum Internal Frequency | β | 100 MHz |
| Supply Voltage | β | 4.5 V to 5.5 V |
| Operating Temperature | β | -40 C to +85 C (industrial) |
| Typical Power Dissipation | β | 600 mW at 5 V / 25 C |
| Technology | β | CMOS, UV-erasable / OTP |
| Package | β | 84-pin PLCC (J-lead), JEDEC S-PQCC-J84 |
| Design Toolchain | β | Altera MAX+plus II |