EPM570F100C5N vs EPM570F100A5N Comparison

Detailed side-by-side comparison of EPM570F100C5N by Altera and EPM570F100A5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM570F100C5N

EPM570F100C5N - 570 LE MAX II CPLD 100-FBGA | Intel / Altera

EPM570F100C5N βœ“ Active
Altera
EPM570F100A5N

EPM570F100A5N - MAX II CPLD, 570 LE, 100-FBGA | Intel / Altera

EPM570F100A5N βœ“ Active

Specification Comparison

Parameter EPM570F100C5N EPM570F100A5N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $5.20 $9.85
Family MAX II MAX II
Logic Elements 570 570
Number of Macrocells 440 β€”
User I/Os 76 β€”
Number of Logic Array Blocks 57 β€”
Propagation Delay (tPD) 5.4 ns β€”
Process Technology 0.18 micron CMOS 0.18 Β΅m flash
Supply Voltage - Internal 2.5 V, 3.3 V β€”
I/O Standards Supported 1.8 V, 2.5 V, 3.3 V LVCMOS/LVTTL β€”
Operating Temperature 0C to 85C (TJ) 0Β°C to +85Β°C (commercial)
Mounting Type Surface Mount β€”
Package / Case 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch β€”
Supplier Device Package 100-FBGA β€”
Configuration Memory On-chip Flash (instant-on, non-volatile) β€”
In-System Programmability Yes (JTAG, IEEE 1532) β€”
User Flash Memory (UFM) 8 Kbit β€”
Lead Free / RoHS Yes (per verified data) β€”
Programming Interface JTAG (IEEE 1149.1) JTAG (IEEE 1149.1) / ISP
Macrocells β€” 440
User Flash Memory β€” 8 Kbits
Pin-to-Pin Delay (tPD) β€” 5.4 ns
Maximum Operating Frequency β€” 201.1 MHz
User I/O Pins (max) β€” 76
Global Clock Lines β€” 4
Supply Voltage - Core β€” 3.3 V
Supply Voltage - I/O Banks β€” 1.5 V / 1.8 V / 2.5 V / 3.3 V
Package β€” 100-ball FBGA
RoHS Status β€” Compliant

Datasheets & Resources

EPM570F100C5N

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EPM570F100A5N

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