EPM570GT100I5 vs EPM570F100I5N Comparison
Detailed side-by-side comparison of EPM570GT100I5 by Altera and EPM570F100I5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM570GT100I5
EPM570GT100I5 - 570 LE MAX II CPLD, 100-TQFP | Intel / Altera
EPM570GT100I5 β ActiveAltera
EPM570F100I5N
EPM570F100I5N - 570 LEs CPLD, 100-FBGA, 5.4ns | Intel / Altera
EPM570F100I5N β ActiveSpecification Comparison
| Parameter | EPM570GT100I5 | EPM570F100I5N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.95 | $13.40 |
| Series | MAX II | β |
| Logic Elements (LE) | 570 | β |
| Macrocells | 440 | 440 |
| Maximum User I/O Pins | 76 | β |
| Propagation Delay (tPD) | 5.4 ns (typ) | 8.7 ns (max), 5.4 ns (typical) |
| Internal Supply Voltage (VCCINT) | 1.71 V to 1.89 V | β |
| User I/O Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | β |
| User Flash Memory | 8 Kbits | 8 Kbits |
| Programmability | In-System Programmable (ISP) via JTAG, non-volatile flash | β |
| Configuration Time | Instant-On (< 1 ms, no external PROM required) | β |
| Operating Temperature | -40 C to +100 C (Industrial, "I5") | -40C to +100C (Industrial) |
| Package | 100-pin TQFP (14x14 mm, 0.5 mm pitch) | 100-ball FineLine BGA (11x11 mm) |
| Mounting Type | Surface Mount (Gull-wing leads) | Surface Mount |
| Typical Active Current | [DATA_NEEDED: typical active ICC] | β |
| Speed Grade | GT (fast) | β |
| RoHS Status | Compliant | Compliant |
| JTAG Support | IEEE 1149.1 boundary scan | β |
| Global Clock Networks | 4 | β |
| Family | β | MAX II |
| Device Type | β | CPLD (Flash-based) |
| Logic Elements (LEs) | β | 570 |
| Maximum User I/Os | β | 76 |
| Maximum Operating Frequency | β | 304 MHz |
| Supply Voltage (VCCINT) | β | 2.375 V to 3.6 V |
| Typical Supply Current (ICC) | β | 55 mA |
| I/O Standards Supported | β | LVCMOS, LVTTL, LVDS, SSTL, HSTL (1.5/1.8/2.5/3.3 V) |
| Programming Interface | β | JTAG (IEEE 1149.1), in-system programmable |
| Global Clocks | β | 4 |
| Process Technology | β | CMOS, Flash configuration cell |
| Hot Socketing | β | Supported |