EPM570GT100I5 vs EPM570T100A5N Comparison
Detailed side-by-side comparison of EPM570GT100I5 by Altera and EPM570T100A5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM570GT100I5
EPM570GT100I5 - 570 LE MAX II CPLD, 100-TQFP | Intel / Altera
EPM570GT100I5 β ActiveAltera
EPM570T100A5N
EPM570T100A5N - 570 LEs, 440 Macrocells, MAX II CPLD | Altera
EPM570T100A5N β ActiveSpecification Comparison
| Parameter | EPM570GT100I5 | EPM570T100A5N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.95 | $6.72 |
| Series | MAX II | β |
| Logic Elements (LE) | 570 | β |
| Macrocells | 440 | 440 |
| Maximum User I/O Pins | 76 | β |
| Propagation Delay (tPD) | 5.4 ns (typ) | β |
| Internal Supply Voltage (VCCINT) | 1.71 V to 1.89 V | β |
| User I/O Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | β |
| User Flash Memory | 8 Kbits | β |
| Programmability | In-System Programmable (ISP) via JTAG, non-volatile flash | β |
| Configuration Time | Instant-On (< 1 ms, no external PROM required) | β |
| Operating Temperature | -40 C to +100 C (Industrial, "I5") | -40 Β°C to +125 Β°C (industrial) |
| Package | 100-pin TQFP (14x14 mm, 0.5 mm pitch) | 100-pin TQFP |
| Mounting Type | Surface Mount (Gull-wing leads) | Surface Mount |
| Typical Active Current | [DATA_NEEDED: typical active ICC] | β |
| Speed Grade | GT (fast) | β |
| RoHS Status | Compliant | Compliant |
| JTAG Support | IEEE 1149.1 boundary scan | β |
| Global Clock Networks | 4 | β |
| Device Family | β | MAX II |
| Logic Elements | β | 570 |
| User I/O Pins | β | 76 |
| Number of Logic Array Blocks (LABs) | β | 57 |
| Pin-to-Pin Logic Delay (tPD) | β | 5.4 ns |
| Maximum Internal Frequency | β | 304 MHz |
| Core Supply Voltage (VCCINT) | β | 1.8 V (typical) |
| I/O Supply Voltage (VCCIO) | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| User Flash Memory (UFM) | β | 8 Kbits |
| Configuration Memory | β | On-chip non-volatile flash |
| Programming Interface | β | JTAG (IEEE 1149.1) - ISP |