EPM570GT100I5N vs EPM570T100A5N Comparison

Detailed side-by-side comparison of EPM570GT100I5N by Altera and EPM570T100A5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM570GT100I5N

EPM570GT100I5N - 440-Macrocell CPLD, 5.4ns, MAX II, 100-TQFP | Altera

EPM570GT100I5N βœ“ Active
Altera
EPM570T100A5N

EPM570T100A5N - 570 LEs, 440 Macrocells, MAX II CPLD | Altera

EPM570T100A5N βœ“ Active

Specification Comparison

Parameter EPM570GT100I5N EPM570T100A5N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $16.50 $6.72
Family MAX II β€”
Logic Elements 570 LE 570
Equivalent Macrocells 440 macrocells β€”
Number of LABs 57 β€”
User I/Os 76 β€”
Maximum Operating Frequency 304 MHz β€”
Propagation Delay (tPD1) 5.4 ns β€”
Operating Supply Voltage (Core) 1.8 V β€”
User Flash Memory 8 Kbit β€”
Package 100-pin TQFP (GT100) 100-pin TQFP
Mounting Type Surface Mount (SMD/SMT) Surface Mount
Operating Temperature -40 Β°C to +100 Β°C (Industrial) -40 Β°C to +125 Β°C (industrial)
Process 0.18 Β΅m, 6-layer-metal flash β€”
JTAG Support Yes (IEEE 1149.1 boundary-scan) β€”
MultiVolt I/O Support 1.8 V / 2.5 V / 3.3 V β€”
Internal Oscillator Yes β€”
Non-volatile Configuration Yes (instant-on, no external boot PROM) β€”
RoHS Status Compliant Compliant
Device Family β€” MAX II
Macrocells β€” 440
User I/O Pins β€” 76
Number of Logic Array Blocks (LABs) β€” 57
Pin-to-Pin Logic Delay (tPD) β€” 5.4 ns
Maximum Internal Frequency β€” 304 MHz
Core Supply Voltage (VCCINT) β€” 1.8 V (typical)
I/O Supply Voltage (VCCIO) β€” 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt)
User Flash Memory (UFM) β€” 8 Kbits
Configuration Memory β€” On-chip non-volatile flash
Programming Interface β€” JTAG (IEEE 1149.1) - ISP

Datasheets & Resources

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