EPM570GT100I5N vs EPM570T144I5N Comparison
Detailed side-by-side comparison of EPM570GT100I5N by Altera and EPM570T144I5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM570GT100I5N
EPM570GT100I5N - 440-Macrocell CPLD, 5.4ns, MAX II, 100-TQFP | Altera
EPM570GT100I5N β ActiveIntel
EPM570T144I5N
EPM570T144I5N - 570 LE MAX II CPLD, 144-TQFP | Intel (Altera)
EPM570T144I5N β Last Time BuySpecification Comparison
| Parameter | EPM570GT100I5N | EPM570T144I5N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.50 | $9.40 |
| Family | MAX II | MAX II |
| Logic Elements | 570 LE | β |
| Equivalent Macrocells | 440 macrocells | β |
| Number of LABs | 57 | β |
| User I/Os | 76 | β |
| Maximum Operating Frequency | 304 MHz | 304 MHz (internal) |
| Propagation Delay (tPD1) | 5.4 ns | β |
| Operating Supply Voltage (Core) | 1.8 V | β |
| User Flash Memory | 8 Kbit | β |
| Package | 100-pin TQFP (GT100) | TQFP-144, 22 mm x 22 mm body, 0.5 mm pitch |
| Mounting Type | Surface Mount (SMD/SMT) | Surface Mount |
| Operating Temperature | -40 Β°C to +100 Β°C (Industrial) | -40C to +100C (industrial, I5N speed grade) |
| Process | 0.18 Β΅m, 6-layer-metal flash | β |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | β |
| MultiVolt I/O Support | 1.8 V / 2.5 V / 3.3 V | β |
| Internal Oscillator | Yes | β |
| Non-volatile Configuration | Yes (instant-on, no external boot PROM) | β |
| RoHS Status | Compliant | Lead-free / Compliant (e1 termination) |
| Logic Elements (LE) | β | 570 |
| Macrocells | β | 440 |
| Maximum User I/O Pins | β | 116 (TQFP-144 package) |
| Pin-to-Pin Delay (tPD) | β | 8.7 ns |
| User Flash Memory (UFM) | β | 8 Kbits |
| User I/O Banks | β | 4 |
| Supply Voltage - Core (VCCINT) | β | 3.0 V to 3.6 V (3.3 V typical) |
| Supply Voltage - I/O (VCCIO) | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Process Technology | β | 0.18 um CMOS, non-volatile flash configuration |
| Programming Interface | β | JTAG (IEEE 1149.1) / ISP |
| MSL Level | β | 3 (per JEDEC J-STD-020) |