EPM570T100C5N vs EPM570T100C3N Comparison
Detailed side-by-side comparison of EPM570T100C5N by Intel and EPM570T100C3N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM570T100C5N
EPM570T100C5N - MAX II 570 LE CPLD, 100-TQFP | Intel (Altera)
EPM570T100C5N β ActiveIntel
EPM570T100C3N
EPM570T100C3N - 440-Macrocell MAX II CPLD, 100-TQFP | Intel / Altera
EPM570T100C3N β ActiveSpecification Comparison
| Parameter | EPM570T100C5N | EPM570T100C3N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.20 | $8.10 |
| Series | MAX II | β |
| Family | CPLD - MAX II | MAX II |
| Logic Elements (LE) | 570 | β |
| Macrocells | 440 | β |
| User I/Os | 76 | β |
| User Flash Memory | 8 Kbit | β |
| Process Technology | 0.18 Β΅m 6-layer-metal Flash | 0.18 Β΅m Flash |
| Internal Performance | 201.1 MHz | β |
| Supply Voltage | 2.5 V / 3.3 V | β |
| Operating Temperature | 0 Β°C to +85 Β°C (commercial) | 0 Β°C to +85 Β°C (Commercial) |
| Package | 100-pin TQFP (T100) | 100-TQFP (T100) |
| Mounting Type | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG / IEEE 1149.1 boundary-scan |
| I/O Standards | 1.5 V / 1.8 V / 2.5 V / 3.3 V MultiVolt | β |
| RoHS Status | Compliant | Compliant |
| Macro Cells | β | 440 |
| Logic Elements (LEs) | β | 570 |
| Maximum User I/Os | β | 76 |
| Pin-to-Pin Delay (tPD1) | β | 5.4 ns |
| Maximum Internal Frequency | β | 304 MHz |
| User Flash Memory (UFM) | β | 8 Kbits |
| Number of LABs | β | 57 |
| Supply Voltage - Core | β | 2.5 V / 3.3 V |
| I/O Standards Supported | β | 1.5 V, 1.8 V, 2.5 V, 3.3 V (MultiVolt) |
| In-System Programmable | β | Yes |
| Speed Grade | β | C3 |