EPM7096LC84-15 vs EPM7128SLC84-15 Comparison

Detailed side-by-side comparison of EPM7096LC84-15 by Altera and EPM7128SLC84-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7096LC84-15 EPM7128SLC84-15
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $9.85 $10.40
Family MAX 7000 MAX 7000S
Series MAX 7000 (second-generation MAX architecture) β€”
Macro Cells 96 β€”
Logic Array Blocks (LABs) 4 β€”
Usable Gates 1,800 2,500
Pin-to-Pin Propagation Delay (tPD) 15 ns β€”
Maximum Operating Frequency 76.9 MHz β€”
User I/O Pins 68 (36 per LAB, [DATA_NEEDED: exact LAB-level split]) β€”
Supply Voltage (VCC) 4.75 V to 5.25 V β€”
Programmable Type EE PLD (in-system programmable via JTAG) β€”
Programming Interface IEEE Std. 1149.1 JTAG JTAG (IEEE Std. 1149.1), in-system programmable
Operating Temperature 0C to +70C (commercial) 0C to +70C (commercial)
Package / Case 84-PLCC (J-Lead) β€”
Supplier Device Package 84-PLCC (29.31 x 29.31 mm) β€”
Mounting Type Surface Mount Surface Mount / Socketed (PLCC-84 socket)
Data Retention [DATA_NEEDED: data retention years] β€”
Erase/Program Endurance [DATA_NEEDED: erase/program cycle count] β€”
RoHS Status [DATA_NEEDED: RoHS compliance status] Non-RoHS (legacy 5V part)
Device Type β€” CPLD - Complex Programmable Logic Device
Macrocells β€” 128
User I/Os β€” 68 (in 84-PLCC)
Package β€” 84-Pin PLCC (J-Lead, J84)
Speed Grade β€” -15 (15 ns pin-to-pin delay)
Propagation Delay (tPD) β€” 15 ns
Maximum Internal Frequency (fMAX) β€” 76.9 MHz
Logic Family / Process β€” CMOS, 5V, EEPROM
Supply Voltage (VCCINT) β€” 5 V
I/O Standard Support β€” 5.0 V TTL/CMOS (multi-volt I/O compatible with 3.3V)
Configuration Memory β€” Non-volatile EEPROM (instant-on, no boot PROM)

Datasheets & Resources

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