EPM7096LC84-7 vs EPM7096LI68-15 Comparison

Detailed side-by-side comparison of EPM7096LC84-7 by Intel and EPM7096LI68-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EPM7096LC84-7

EPM7096LC84-7 - 96-Macrocell MAX 7000 CPLD, 7.5ns, PLCC-84 | Intel

EPM7096LC84-7 Obsolete
Intel
EPM7096LI68-15

EPM7096LI68-15 - 96-Macrocell MAX 7000 CPLD, 15ns, PLCC-68

EPM7096LI68-15 ⚠ Last Time Buy

Specification Comparison

Parameter EPM7096LC84-7 EPM7096LI68-15
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $19.85 $9.85
Family MAX 7000 MAX 7000 (second-generation MAX architecture)
Macrocells 96 96
Logic Array Blocks (LABs) 4 4
User I/O Pins 64 52
Speed Grade (tPD) 7.5 ns β€”
Package 84-pin PLCC (Plastic Leaded Chip Carrier) 68-pin PLCC (J-lead, QCCJ)
Mounting Type Surface Mount Surface Mount (J-lead)
Supply Voltage 5.0 V β€”
Programming Technology EEPROM (non-volatile) β€”
In-System Programmability Yes (IEEE 1149.1 JTAG) β€”
Architecture Second-generation MAX β€”
I/O Logic Levels 5.0 V TTL/CMOS-compatible β€”
Operating Temperature 0C to +70C (commercial, LC suffix) β€”
RoHS Status Non-compliant (original Altera product, leaded PLCC package) [DATA_NEEDED: RoHS status]
Lifecycle Status Obsolete - PCN/PDN issued by Intel β€”
Propagation Delay (tPD) β€” 15 ns
Supply Voltage (VCCINT) β€” 5.0 V
Programmable Logic Type β€” EEPROM-based, in-system programmable (ISP)
Programming Interface β€” IEEE Std. 1149.1 JTAG
Boundary-Scan Test (BST) β€” Built-in JTAG BST circuitry
Output Option β€” Open-drain output option available
Operating Temperature Grade β€” Industrial (-40C to +85C)
Speed Grade β€” -15 (15 ns tPD)
Process Technology β€” CMOS EEPROM

Datasheets & Resources

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