EPM7096LI68-15 vs EPM7096LC68-15 Comparison

Detailed side-by-side comparison of EPM7096LI68-15 by Intel and EPM7096LC68-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EPM7096LI68-15

EPM7096LI68-15 - 96-Macrocell MAX 7000 CPLD, 15ns, PLCC-68

EPM7096LI68-15 ⚠ Last Time Buy
Altera
EPM7096LC68-15

EPM7096LC68-15 - MAX 7000 CPLD, 96 Macrocells, 15ns | Altera

EPM7096LC68-15 Nrnd

Specification Comparison

Parameter EPM7096LI68-15 EPM7096LC68-15
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $9.85 $7.20
Family MAX 7000 (second-generation MAX architecture) MAX 7000
Macrocells 96 96
Logic Array Blocks (LABs) 4 4
User I/O Pins 52 52
Propagation Delay (tPD) 15 ns 15 ns
Supply Voltage (VCCINT) 5.0 V β€”
Programmable Logic Type EEPROM-based, in-system programmable (ISP) β€”
Programming Interface IEEE Std. 1149.1 JTAG β€”
Boundary-Scan Test (BST) Built-in JTAG BST circuitry β€”
Output Option Open-drain output option available β€”
Operating Temperature Grade Industrial (-40C to +85C) β€”
Package 68-pin PLCC (J-lead, QCCJ) PLCC-68 (LC68)
Mounting Type Surface Mount (J-lead) Surface Mount (PLCC socket compatible)
Speed Grade -15 (15 ns tPD) β€”
RoHS Status [DATA_NEEDED: RoHS status] β€”
Process Technology CMOS EEPROM β€”
Supply Voltage (VCCINT/VCCIO) β€” 4.75 V to 5.25 V (5 V nominal)
Programmable Technology β€” EEPROM (second-generation MAX architecture)
In-System Programming β€” Yes (IEEE 1149.1 JTAG)
Logic Gates (typical) β€” 1800 gates
Memory Bits β€” Non-volatile configuration, 100 erase/program cycles per macrocell
Operating Temperature β€” 0C to +70C (commercial)
Lead-Free / RoHS β€” Compliant per Altera product page
Programming Tool Support β€” Altera MAX+PLUS II, Quartus II; ByteBlaster / ByteBlasterMV

Datasheets & Resources

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