EPM7096QC100-7 vs EPM7096QC100-10 Comparison
Detailed side-by-side comparison of EPM7096QC100-7 by Altera and EPM7096QC100-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7096QC100-7 - MAX 7000 CPLD, 96 Macrocells, 7.5ns | Altera
EPM7096QC100-7 β Last Time BuyAltera
EPM7096QC100-10 - 96-Macrocell MAX 7000 CPLD, 10ns, PQFP-100 | Altera
EPM7096QC100-10 ObsoleteSpecification Comparison
| Parameter | EPM7096QC100-7 | EPM7096QC100-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $31.00 | $7.10 |
| Family | MAX 7000 | MAX 7000 |
| Series | MAX 7000 | β |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Programmable Type | EE PLD (EEPROM-based, in-system programmable) | β |
| Macrocells | 96 | 96 |
| User I/Os | 76 | β |
| Logic Elements / Gates | 1800 gates (typical) | β |
| Pin-to-Pin Delay (tPD) | 7.5 ns | β |
| Maximum Frequency (fMAX) | 125 MHz | β |
| Supply Voltage - Internal | 4.75 V to 5.25 V | β |
| Package / Case | 100-BQFP (PQFP-100, 20x14 mm, 0.65 mm pitch) | β |
| Supplier Device Package | 100-PQFP (20x14) | β |
| Operating Temperature | 0C to +70C (commercial) | 0 Β°C to +70 Β°C (commercial) |
| Program Memory | EEPROM (non-volatile, in-system programmable) | β |
| Programming Interface | JTAG (IEEE 1149.1) / ByteBlaster | ByteBlaster / parallel (JTAG ISP on MAX 7000S variants) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Logic Array Blocks | β | 4 |
| User I/O Pins | β | 76 |
| Propagation Delay (tPD) | β | 10 ns |
| Maximum Operating Frequency | β | 100 MHz |
| Supply Voltage (VCC) | β | 4.75 V to 5.25 V |
| Technology | β | EEPROM-based CMOS |
| Boundary Scan | β | IEEE Std. 1149.1 (JTAG) on MAX 7000S |
| PCI Compliance | β | Yes (PCI SIG Local Bus Specification Rev. 2.2 at -10 speed grade) |
| Package | β | 100-pin PQFP (R-PQFP-G100, 20Γ14 mm, 0.65 mm pitch) |