EPM7128AELC84-10N vs EPM7128ELC84-12 Comparison
Detailed side-by-side comparison of EPM7128AELC84-10N by Intel and EPM7128ELC84-12 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7128AELC84-10N
EPM7128AELC84-10N - MAX 7000A CPLD, 128 Macro, 10ns, 84-PLCC | Intel
EPM7128AELC84-10N β ActiveAltera
EPM7128ELC84-12
EPM7128ELC84-12 - 128-Macrocell MAX 7000 CPLD, 12ns, 84-PLCC
EPM7128ELC84-12 ObsoleteSpecification Comparison
| Parameter | EPM7128AELC84-10N | EPM7128ELC84-12 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.45 | $10.40 |
| Family | MAX 7000A | MAX 7000 (MAX 7000E series) |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Macro Cells | 128 | β |
| Usable Gates | 2,500 | 2,500 |
| Propagation Delay (tPD) | 10 ns | β |
| User I/O Pins | 68 | β |
| Supply Voltage (VCCINT) | 3.3 V | β |
| Maximum Internal Frequency (fCNT) | 147.1 MHz | β |
| Process Technology | 0.30 Β΅m CMOS EEPROM | β |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | β |
| MultiVolt I/O Interface | 2.5 V / 3.3 V / 5 V mixed | β |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Package | 84-pin PLCC (J-Lead) | 84-pin PLCC (J-Lead, QCCJ) |
| Mounting Type | Surface Mount / Through-Hole socket | Surface Mount (PLCC socket compatible) |
| RoHS Status | Compliant | Non-compliant (legacy 5V part, SnPb finish) |
| Configuration Memory | Non-volatile EEPROM | β |
| Power-Up Speed | Instant-on (no boot PROM required) | β |
| Logic Family | β | CMOS, EEPROM-based |
| Macrocells | β | 128 |
| Logic Array Blocks (LABs) | β | 8 |
| User I/Os | β | 84 |
| Propagation Delay (tpd1) | β | 12 ns |
| Internal Global Clock Frequency | β | 90.9 MHz |
| Setup Time | β | 4.5 ns |
| Supply Voltage (VCCINT / VCCIO) | β | 5 V (4.75 V to 5.25 V) |
| Programming Interface | β | JTAG (IEEE 1149.1) / ISP |
| Pin Count | β | 84 |