EPM7128AETC100-7N vs EPM7128AETI100-7 Comparison

Detailed side-by-side comparison of EPM7128AETC100-7N by Altera and EPM7128AETI100-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7128AETC100-7N EPM7128AETI100-7
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $31.80 $30.10
Family MAX 7000A MAX 7000A
Device Type CPLD - Complex Programmable Logic Device CPLD (Complex Programmable Logic Device)
Macro Cells 128 β€”
Usable Gates 2,500 2,500
Logic Array Blocks (LABs) 4 β€”
User I/Os 84 84
Propagation Delay (tpd) 7.5 ns β€”
Counter Frequency (max) 129.9 MHz β€”
Internal Frequency (max) 250 MHz β€”
Core Supply Voltage 3.3 V β€”
Logic Family CMOS β€”
Pin Count 100 β€”
Package 100-TQFP 100-pin TQFP (1.0 mm pitch, 14 x 14 mm)
Mounting Type Surface Mount Surface Mount
Operating Temperature 0 C to +70 C (Commercial) -40 C to +85 C (Industrial)
Programming Interface JTAG (IEEE 1149.1) / ISP β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: confirm RoHS for non-N suffix]
Process Technology 0.30 Β΅m EEPROM CMOS β€”
Macrocells β€” 128
Logic Blocks (LABs) β€” 8
Pin-to-Pin Delay (tPD) β€” 7.5 ns
Maximum Counter Frequency β€” 129.9 MHz
Supply Voltage - Core (VCCINT) β€” 3.3 V
I/O Bank Supply (VCCIO) β€” 2.5 V / 3.3 V / 5 V (MultiVolt)
Configuration Memory β€” EEPROM (non-volatile, in-system programmable)
JTAG Support β€” Yes (IEEE 1149.1 boundary-scan)
Global Clock Inputs β€” 4 dedicated
Lead-Free Version (MPN Suffix) β€” -N suffix denotes lead-free (e.g., EPM7128AETI100-7N)

Datasheets & Resources

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