EPM7128AETC100-7N vs EPM7128AETI100-7N Comparison
Detailed side-by-side comparison of EPM7128AETC100-7N by Altera and EPM7128AETI100-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128AETI100-7N - MAX 7000A CPLD 128 Macro 84 I/O | Intel/Altera
EPM7128AETI100-7N ObsoleteSpecification Comparison
| Parameter | EPM7128AETC100-7N | EPM7128AETI100-7N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $31.80 | $28.50 |
| Family | MAX 7000A | MAX 7000A CPLD |
| Device Type | CPLD - Complex Programmable Logic Device | β |
| Macro Cells | 128 | 128 |
| Usable Gates | 2,500 | β |
| Logic Array Blocks (LABs) | 4 | β |
| User I/Os | 84 | β |
| Propagation Delay (tpd) | 7.5 ns | β |
| Counter Frequency (max) | 129.9 MHz | β |
| Internal Frequency (max) | 250 MHz | β |
| Core Supply Voltage | 3.3 V | β |
| Logic Family | CMOS | β |
| Pin Count | 100 | β |
| Package | 100-TQFP | 100-pin TQFP (14x14 mm) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0 C to +70 C (Commercial) | -40C to +85C (Industrial) |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant |
| Process Technology | 0.30 Β΅m EEPROM CMOS | CMOS EEPROM |
| Series | β | MAX 7000A |
| Number of Usable Gates | β | 2,500 |
| Number of I/O | β | 84 |
| Number of Logic Array Blocks (LABs) | β | 8 |
| Propagation Delay (tPD max) | β | 7 ns |
| Maximum Operating Frequency (fCNT) | β | 129.9 MHz |
| Supply Voltage (VCCINT) | β | 3.0 V to 3.6 V |
| I/O Bank Voltage (VCCIO) | β | 2.5 V / 3.3 V / 5.0 V (multi-volt I/O) |
| In-System Programmability | β | Yes (JTAG IEEE 1149.1) |