EPM7128AETC144-7 vs EPM7128AETC144-10 Comparison
Detailed side-by-side comparison of EPM7128AETC144-7 by Intel and EPM7128AETC144-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7128AETC144-7 | EPM7128AETC144-10 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.40 | $21.70 |
| Series | MAX 7000A | β |
| Programmable Type | In-System Programmable (ISP), EEPROM | β |
| Number of Macrocells | 128 | β |
| Number of Logic Array Blocks (LABs) | 8 | β |
| Number of Usable Gates | 2,500 | β |
| Number of I/Os | 100 | β |
| Propagation Delay (tPD) Max | 7.5 ns | β |
| Maximum Operating Frequency | 129.9 MHz | β |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | β |
| I/O Voltage (MultiVolt) | 2.5 V / 3.3 V / 5.0 V tolerant | β |
| Operating Temperature | 0C to +70C (Commercial) | 0C to +70C (Commercial) |
| Package | 144-pin TQFP (20x20 mm) | 144-pin TQFP (also referred to as LQFP-144) |
| Mounting Type | Surface Mount | Surface Mount |
| Programming Interface | IEEE 1149.1 JTAG (ByteBlaster / USB-Blaster) | JTAG (IEEE Std. 1149.1) and ByteBlaster |
| Configuration Memory | EEPROM, non-volatile | β |
| ISP Endurance | 100 cycles typical per macrocell | β |
| Process Technology | CMOS | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status from manufacturer] |
| Family | β | MAX 7000A |
| Macrocells | β | 128 |
| Usable Gates | β | 2,500 |
| Logic Array Blocks (LABs) | β | 8 |
| Maximum User I/Os | β | 36 |
| Pin-to-pin Logic Delay (tPD) | β | 10 ns |
| Maximum Internal Counter Frequency | β | 98 MHz |
| Supply Voltage (Core) | β | 3.3 V |
| I/O Voltage Tolerance | β | 2.5 V / 3.3 V / 5 V |
| Non-volatile Memory | β | EEPROM, instant-on |
| Global Clocks / Global OE | β | 2 / 2 |
| MSL Level | β | MSL 3 (per JEDEC J-STD-020) |