EPM7128AETC144-7 vs EPM7128ATC144-10 Comparison
Detailed side-by-side comparison of EPM7128AETC144-7 by Intel and EPM7128ATC144-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7128AETC144-7
EPM7128AETC144-7 - 128-Macrocell 7.5ns MAX 7000A CPLD | Intel
EPM7128AETC144-7 ObsoleteAltera
EPM7128ATC144-10
EPM7128ATC144-10 - 128-Macrocell MAX 7000A CPLD | Intel / Altera
EPM7128ATC144-10 ObsoleteSpecification Comparison
| Parameter | EPM7128AETC144-7 | EPM7128ATC144-10 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.40 | $9.10 |
| Series | MAX 7000A | MAX 7000A |
| Programmable Type | In-System Programmable (ISP), EEPROM | EE PLD (EEPROM-based, in-system programmable) |
| Number of Macrocells | 128 | β |
| Number of Logic Array Blocks (LABs) | 8 | β |
| Number of Usable Gates | 2,500 | β |
| Number of I/Os | 100 | β |
| Propagation Delay (tPD) Max | 7.5 ns | β |
| Maximum Operating Frequency | 129.9 MHz | β |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | β |
| I/O Voltage (MultiVolt) | 2.5 V / 3.3 V / 5.0 V tolerant | β |
| Operating Temperature | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| Package | 144-pin TQFP (20x20 mm) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Programming Interface | IEEE 1149.1 JTAG (ByteBlaster / USB-Blaster) | β |
| Configuration Memory | EEPROM, non-volatile | β |
| ISP Endurance | 100 cycles typical per macrocell | β |
| Process Technology | CMOS | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | unknown (legacy Altera device) |
| Manufacturer | β | Altera (now Intel) |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Macrocells | β | 128 |
| Logic Array Blocks | β | 4 |
| User I/O Pins | β | 68 |
| Propagation Delay (tPD) | β | 10 ns |
| Maximum Counter Frequency | β | 98 MHz |
| Supply Voltage - Internal (VCCINT) | β | 3.0 V to 3.6 V |
| I/O Voltage Levels | β | 5.0 V / 3.3 V / 2.5 V compatible (MultiVolt I/O) |
| In-System Programmability | β | Yes (IEEE Std 1149.1 JTAG) |
| Package / Case | β | 144-TQFP (20 x 20 mm) |
| Architecture | β | Multiple Array Matrix (MAX), 2nd generation |