EPM7128AETI100-7 vs EPM7128AETC100-7N Comparison

Detailed side-by-side comparison of EPM7128AETI100-7 by Altera and EPM7128AETC100-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7128AETI100-7 EPM7128AETC100-7N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $30.10 $31.80
Family MAX 7000A MAX 7000A
Device Type CPLD (Complex Programmable Logic Device) CPLD - Complex Programmable Logic Device
Macrocells 128 β€”
Usable Gates 2,500 2,500
User I/Os 84 84
Logic Blocks (LABs) 8 β€”
Pin-to-Pin Delay (tPD) 7.5 ns β€”
Maximum Counter Frequency 129.9 MHz β€”
Supply Voltage - Core (VCCINT) 3.3 V β€”
I/O Bank Supply (VCCIO) 2.5 V / 3.3 V / 5 V (MultiVolt) β€”
Configuration Memory EEPROM (non-volatile, in-system programmable) β€”
JTAG Support Yes (IEEE 1149.1 boundary-scan) β€”
Global Clock Inputs 4 dedicated β€”
Package 100-pin TQFP (1.0 mm pitch, 14 x 14 mm) 100-TQFP
Operating Temperature -40 C to +85 C (Industrial) 0 C to +70 C (Commercial)
Mounting Type Surface Mount Surface Mount
RoHS Status [DATA_NEEDED: confirm RoHS for non-N suffix] [DATA_NEEDED: RoHS status]
Lead-Free Version (MPN Suffix) -N suffix denotes lead-free (e.g., EPM7128AETI100-7N) β€”
Macro Cells β€” 128
Logic Array Blocks (LABs) β€” 4
Propagation Delay (tpd) β€” 7.5 ns
Counter Frequency (max) β€” 129.9 MHz
Internal Frequency (max) β€” 250 MHz
Core Supply Voltage β€” 3.3 V
Logic Family β€” CMOS
Pin Count β€” 100
Programming Interface β€” JTAG (IEEE 1149.1) / ISP
Process Technology β€” 0.30 Β΅m EEPROM CMOS

Datasheets & Resources

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