EPM7128AETI144-10N vs EPM7128AETC144-7N Comparison

Detailed side-by-side comparison of EPM7128AETI144-10N by Altera and EPM7128AETC144-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7128AETI144-10N EPM7128AETC144-7N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Active
Stock Status In Stock In Stock
Unit Price (USD) $23.10 $39.82
Family MAX 7000A MAX 7000A
Macrocells 128 β€”
Usable Gates 2,500 β€”
Logic Array Blocks (LABs) 8 β€”
Maximum User I/O Pins 100 β€”
Propagation Delay (tPD) 10 ns β€”
Supply Voltage (VCCINT) 3.0 V to 3.6 V (3.3 V nominal) 3.3 V
Programming Technology EEPROM (in-system programmable) β€”
JTAG Interface IEEE Std 1149.1 BST compliant β€”
Package TQFP-144 (144-pin) 144-pin TQFP
Operating Temperature -40C to +85C (industrial) 0C to +70C (commercial)
Process Technology 0.35 Β΅m CMOS EEPROM CMOS, EEPROM-based
Mounting Type Surface Mount Surface Mount
MSL Level 3 β€”
RoHS Status Compliant Compliant
Speed Grade -10 (10 ns tPD) β€”
Operating Frequency (fCNT) [DATA_NEEDED: fCNT counter frequency] β€”
Device Type β€” CPLD (Complex Programmable Logic Device)
Logic Gates β€” 2500 (2.5K gates)
Macro Cells β€” 128
User I/Os β€” 36 (in 144-pin TQFP)
Maximum Operating Frequency β€” 129.9 MHz
Pin-to-Pin Delay β€” 7.5 ns
Propagation Delay (tpd) β€” 7.5 ns
Programmability β€” In-System Programmable (ISP) via JTAG
Boundary-Scan Test β€” IEEE Std 1149.1 (JTAG)
Pin-Compatible With β€” MAX 7000S 5.0V family (144-pin TQFP)
Lead-Free β€” Yes

Datasheets & Resources

Browse All Products Create BOM Request Quote