EPM7128ATC100-10 vs EPM7128AET1100-7 Comparison
Detailed side-by-side comparison of EPM7128ATC100-10 by Altera and EPM7128AET1100-7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128ATC100-10
EPM7128ATC100-10 - MAX 7000A CPLD, 128 Macrocells, 10ns TQFP-100 | Altera
EPM7128ATC100-10 ObsoleteIntel
EPM7128AET1100-7
EPM7128AET1100-7 - 128-Macrocell MAX 7000A CPLD | Intel
EPM7128AET1100-7 β Last Time BuySpecification Comparison
| Parameter | EPM7128ATC100-10 | EPM7128AET1100-7 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.95 | $16.40 |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Family | MAX 7000A | MAX 7000A (MAX 7000AE) |
| Architecture | Multiple Array MatriX (MAX) | β |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 4 | β |
| Usable Gates | 2.5K | 2,500 |
| User I/O Pins | 68 | 84 |
| Pin-to-Pin Logic Delay | 4.5 ns | β |
| Counter Frequency (max) | 227.3 MHz | β |
| Speed Grade | -10 (10 ns) | -7 (5 ns pin-to-pin) |
| Core Supply Voltage | 3.3 V | β |
| I/O Logic Level Support | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | β |
| Program Memory | EEPROM (non-volatile) | β |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | β |
| Package | 100-pin TQFP (TC100) | TQFP-100 |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0C to +70C (commercial) | -40C to +85C (industrial) |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | ROHS3 Compliant |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Logic Elements / LABs | β | [DATA_NEEDED: LAB count for 7128A] |
| Supply Voltage VCC | β | 5.0 V (typical) |
| I/O Voltage Tolerance | β | 3.3 V / 5.0 V |
| Configuration Memory | β | EEPROM (non-volatile, instant-on) |
| Programming Interface | β | IEEE 1149.1 JTAG / ByteBlaster |
| MSL Level | β | 3 (168 hours, per JEDEC J-STD-020) |
| Lead-Free | β | Yes |
| Process Technology | β | CMOS, EEPROM-based |