EPM7128ATC100-10 vs EPM7128ATC100-7F Comparison
Detailed side-by-side comparison of EPM7128ATC100-10 by Altera and EPM7128ATC100-7F by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128ATC100-10
EPM7128ATC100-10 - MAX 7000A CPLD, 128 Macrocells, 10ns TQFP-100 | Altera
EPM7128ATC100-10 ObsoleteAltera
EPM7128ATC100-7F
EPM7128ATC100-7F - 128-Macrocell MAX 7000A CPLD, 7.5ns, 100-TQFP | Intel / Altera
EPM7128ATC100-7F NrndSpecification Comparison
| Parameter | EPM7128ATC100-10 | EPM7128ATC100-7F |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.95 | $9.85 |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Family | MAX 7000A | MAX 7000A |
| Architecture | Multiple Array MatriX (MAX) | β |
| Macrocells | 128 | β |
| Logic Array Blocks (LABs) | 4 | 8 |
| Usable Gates | 2.5K | 2.5K |
| User I/O Pins | 68 | 84 (per MicrochipUSA) / 100 (per MAX 7000A datasheet range) |
| Pin-to-Pin Logic Delay | 4.5 ns | β |
| Counter Frequency (max) | 227.3 MHz | β |
| Speed Grade | -10 (10 ns) | β |
| Core Supply Voltage | 3.3 V | β |
| I/O Logic Level Support | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | β |
| Program Memory | EEPROM (non-volatile) | β |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | β |
| Package | 100-pin TQFP (TC100) | 100-pin TQFP (14x14 mm) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0C to +70C (commercial) | -40C to +85C (industrial) |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Device | β | EPM7128A |
| Logic Elements / Macrocells | β | 128 macrocells |
| Propagation Delay (tPD) | β | 7.5 ns |
| Maximum Internal Frequency (fMAX) | β | 116.3 MHz |
| Supply Voltage - Internal | β | 3.0 V to 3.6 V (nominal 3.3 V) |
| I/O Voltage | β | 2.5 V / 3.3 V (MultiVolt) |
| Programmable Type | β | EEPROM (in-system programmable, non-volatile) |
| JTAG Support | β | IEEE Std 1149.1 boundary-scan + ISP |
| Process Technology | β | CMOS, EEPROM configuration |