EPM7128ATC100-7F vs EPM7128EQC100-10 Comparison
Detailed side-by-side comparison of EPM7128ATC100-7F by Altera and EPM7128EQC100-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128ATC100-7F
EPM7128ATC100-7F - 128-Macrocell MAX 7000A CPLD, 7.5ns, 100-TQFP | Intel / Altera
EPM7128ATC100-7F NrndAltera
EPM7128EQC100-10
EPM7128EQC100-10 - 128-Macrocell MAX 7000 CPLD, 10ns, PQFP-100
EPM7128EQC100-10 ObsoleteSpecification Comparison
| Parameter | EPM7128ATC100-7F | EPM7128EQC100-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.85 | $9.85 |
| Family | MAX 7000A | MAX 7000 |
| Device | EPM7128A | β |
| Logic Elements / Macrocells | 128 macrocells | β |
| Logic Array Blocks (LABs) | 8 | 4 |
| Usable Gates | 2.5K | 2,500 |
| User I/O Pins | 84 (per MicrochipUSA) / 100 (per MAX 7000A datasheet range) | 84 |
| Propagation Delay (tPD) | 7.5 ns | β |
| Maximum Internal Frequency (fMAX) | 116.3 MHz | β |
| Supply Voltage - Internal | 3.0 V to 3.6 V (nominal 3.3 V) | β |
| I/O Voltage | 2.5 V / 3.3 V (MultiVolt) | β |
| Programmable Type | EEPROM (in-system programmable, non-volatile) | β |
| JTAG Support | IEEE Std 1149.1 boundary-scan + ISP | β |
| Package | 100-pin TQFP (14x14 mm) | 100-pin PQFP (Plastic Quad Flat Pack), gull-wing leads |
| Operating Temperature | -40C to +85C (industrial) | 0 Β°C to +90 Β°C (Commercial) |
| Process Technology | CMOS, EEPROM configuration | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Logic Family | β | CPLD - Complex Programmable Logic Device |
| Macrocells | β | 128 |
| Propagation Delay (tpd) | β | 10 ns |
| Internal Performance | β | 100 MHz |
| Supply Voltage (VCCINT) | β | 4.75 V to 5.25 V |
| Technology | β | 5.0 V CMOS, EEPROM-based |
| In-System Programmability | β | Yes (IEEE Std. 1149.1 JTAG) |