EPM7128ATC144-10 vs EPM7128AETC144-7 Comparison
Detailed side-by-side comparison of EPM7128ATC144-10 by Altera and EPM7128AETC144-7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7128ATC144-10 | EPM7128AETC144-7 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.10 | $16.40 |
| Manufacturer | Altera (now Intel) | β |
| Series | MAX 7000A | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Programmable Type | EE PLD (EEPROM-based, in-system programmable) | In-System Programmable (ISP), EEPROM |
| Macrocells | 128 | β |
| Logic Array Blocks | 4 | β |
| User I/O Pins | 68 | β |
| Propagation Delay (tPD) | 10 ns | β |
| Maximum Counter Frequency | 98 MHz | β |
| Supply Voltage - Internal (VCCINT) | 3.0 V to 3.6 V | β |
| I/O Voltage Levels | 5.0 V / 3.3 V / 2.5 V compatible (MultiVolt I/O) | β |
| In-System Programmability | Yes (IEEE Std 1149.1 JTAG) | β |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| Package / Case | 144-TQFP (20 x 20 mm) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Architecture | Multiple Array Matrix (MAX), 2nd generation | β |
| RoHS Status | unknown (legacy Altera device) | [DATA_NEEDED: RoHS status] |
| Number of Macrocells | β | 128 |
| Number of Logic Array Blocks (LABs) | β | 8 |
| Number of Usable Gates | β | 2,500 |
| Number of I/Os | β | 100 |
| Propagation Delay (tPD) Max | β | 7.5 ns |
| Maximum Operating Frequency | β | 129.9 MHz |
| Supply Voltage (VCCINT) | β | 3.0 V to 3.6 V |
| I/O Voltage (MultiVolt) | β | 2.5 V / 3.3 V / 5.0 V tolerant |
| Package | β | 144-pin TQFP (20x20 mm) |
| Programming Interface | β | IEEE 1149.1 JTAG (ByteBlaster / USB-Blaster) |
| Configuration Memory | β | EEPROM, non-volatile |
| ISP Endurance | β | 100 cycles typical per macrocell |
| Process Technology | β | CMOS |