EPM7128ATC144-10 vs EPM7128AETC144-7N Comparison
Detailed side-by-side comparison of EPM7128ATC144-10 by Altera and EPM7128AETC144-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128AETC144-7N - MAX 7000A CPLD, 128 Macros, 144-TQFP | Intel / Altera
EPM7128AETC144-7N β ActiveSpecification Comparison
| Parameter | EPM7128ATC144-10 | EPM7128AETC144-7N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.10 | $39.82 |
| Manufacturer | Altera (now Intel) | β |
| Series | MAX 7000A | β |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Programmable Type | EE PLD (EEPROM-based, in-system programmable) | β |
| Macrocells | 128 | β |
| Logic Array Blocks | 4 | β |
| User I/O Pins | 68 | β |
| Propagation Delay (tPD) | 10 ns | β |
| Maximum Counter Frequency | 98 MHz | β |
| Supply Voltage - Internal (VCCINT) | 3.0 V to 3.6 V | β |
| I/O Voltage Levels | 5.0 V / 3.3 V / 2.5 V compatible (MultiVolt I/O) | β |
| In-System Programmability | Yes (IEEE Std 1149.1 JTAG) | β |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Package / Case | 144-TQFP (20 x 20 mm) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Architecture | Multiple Array Matrix (MAX), 2nd generation | β |
| RoHS Status | unknown (legacy Altera device) | Compliant |
| Family | β | MAX 7000A |
| Logic Gates | β | 2500 (2.5K gates) |
| Macro Cells | β | 128 |
| User I/Os | β | 36 (in 144-pin TQFP) |
| Maximum Operating Frequency | β | 129.9 MHz |
| Pin-to-Pin Delay | β | 7.5 ns |
| Propagation Delay (tpd) | β | 7.5 ns |
| Supply Voltage (VCCINT) | β | 3.3 V |
| Process Technology | β | CMOS, EEPROM-based |
| Programmability | β | In-System Programmable (ISP) via JTAG |
| Boundary-Scan Test | β | IEEE Std 1149.1 (JTAG) |
| Package | β | 144-pin TQFP |
| Pin-Compatible With | β | MAX 7000S 5.0V family (144-pin TQFP) |
| Lead-Free | β | Yes |