EPM7128ELC84-10 vs EPM7128SLC84-10 Comparison
Detailed side-by-side comparison of EPM7128ELC84-10 by Intel and EPM7128SLC84-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7128ELC84-10
EPM7128ELC84-10 - 128-Macrocell CPLD, 10ns, 5V, 84-PLCC | Intel
EPM7128ELC84-10 β ActiveIntel
EPM7128SLC84-10
EPM7128SLC84-10 - MAX 7000 CPLD, 128 Macro, 68 I/O, 10ns | Intel
EPM7128SLC84-10 ObsoleteSpecification Comparison
| Parameter | EPM7128ELC84-10 | EPM7128SLC84-10 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.20 | $9.75 |
| Family | MAX 7000 | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | 128 |
| Equivalent Logic Gates | [DATA_NEEDED: equivalent gate count from datasheet] | β |
| User I/Os | 68 | 68 |
| Dedicated Inputs | 12 | β |
| Operating Voltage (VCCINT/VCClO) | 5 V | β |
| Pin-to-Pin Delay (tPD) | 10 ns | β |
| Counter Frequency (fCNT) | [DATA_NEEDED: fCNT from datasheet] | β |
| Package | 84-pin PLCC (J-Lead) | PLCC-84 (J-lead) |
| Mounting Type | Surface Mount / Socket | Surface Mount (J-bend) |
| Operating Temperature | 0C to +70C (Commercial) | 0C to +70C (Commercial) |
| Technology | EEPROM-based CMOS | β |
| Programming Interface | IEEE 1149.1 (JTAG) ISP | β |
| In-System Programmable | Yes | β |
| RoHS Status | [DATA_NEEDED: RoHS status from datasheet] | Non-compliant (contains lead in PLCC) |
| Lead-Free | [DATA_NEEDED: lead-free status from datasheet] | β |
| Logic Gates | β | 2500 |
| Total Package Pins | β | 84 |
| Propagation Delay (tpd) | β | 10 ns |
| Maximum Operating Frequency | β | 125 MHz |
| Internal Frequency | β | 250 MHz |
| Supply Voltage (VCCINT) | β | 5 V |
| MultiVolt I/O Support | β | 2.5 V / 3.3 V / 5 V |
| Program Memory Type | β | EEPROM (in-system programmable) |
| JTAG (IEEE 1149.1) | β | Yes |
| MSL Level | β | [DATA_NEEDED: MSL level] |